From patchwork Sat Nov 5 14:59:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 13033066 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E27CC3A5A1 for ; Sat, 5 Nov 2022 15:03:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8C//9EmFCN+FOjkg4gjYNodqeLGp2V6gUktjroSg+mg=; b=QGm23NYo7OGGg4 Cag1lh5Y1AhasSEE6d4p+nVHLU+F7Bhdj1pqttuV99O9LyHES0jv6iJeKrahZoQHwFfjozZgml/6t CJr5Cl8rUp25vIe3jm6zAD+A+OW+T84qft4UKjhw4XisVOGp16iLg0zrCaW1hJlMDN+F0D9U96+7a 7fxkRU7vnAjP/1DRevBpD/9GRpCb810rgwXmhEc9+C9KgupS4Nvy+t8SQERmEVXXpKsZkAMwaxeZf rr9HSMHLJLDLW9yr8thwL86wp/8n8X030Ywb+kwek4BmeazJ0sgg5kaM0+BFCDlfsOfTXoka5pD79 peUiKeDMZsN26YJ1/F+A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1orKhJ-006mMw-JP; Sat, 05 Nov 2022 15:03:01 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1orKhD-006mFu-3i for linux-phy@lists.infradead.org; Sat, 05 Nov 2022 15:02:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2F21660B7F; Sat, 5 Nov 2022 15:02:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 96879C4FEB8; Sat, 5 Nov 2022 15:02:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1667660570; bh=MmXDznnSWi2N+vm4h8k+0cywq3oyWjC6jZeWQ9DCFqU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZD97lZeWhF/oymeOGLVF3LLUGS3CcrOJiNyZn/drwrxIHmytA1NZwMhKHdmxHzjH/ HZAFOuARswSt7g3QAT2/dJe7yxDxAaZCms/Sgek8/RJHxbLkA3wtFjxybJCTvX93CR IDjlCHcUVRruBnIcH1tDmwkIVFdqvwKrfQ+2bNDLeFyYaFaXIjS99u3DuU8JQiii89 7hdyyzcZvPu15uCp1oTr/8iv4kQ806VunzB3VPW9qwkNeExjFZgM4ifR9Mmr2Lww0y JVZBCPgjE1Jyo5QLoTXEh9FQi4cCgeH37VCQOb3wcX+0NqyI/frQu/l1/aWFh/qN6j gdk42AsfOtjtQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1orKgp-0005Kg-Ij; Sat, 05 Nov 2022 16:02:31 +0100 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski Subject: [PATCH v5 10/16] dt-bindings: phy: qcom,qmp-pcie: rename current bindings Date: Sat, 5 Nov 2022 15:59:33 +0100 Message-Id: <20221105145939.20318-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221105145939.20318-1-johan+linaro@kernel.org> References: <20221105145939.20318-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221105_080255_263948_EC971177 X-CRM114-Status: GOOD ( 13.01 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The current QMP PCIe PHY bindings are based on the original MSM8996 binding which provided multiple PHYs per IP block and these in turn were described by child nodes. Later QMP PCIe PHY blocks only provide a single PHY and the remnant child node does not really reflect the hardware. The original MSM8996 binding also ended up describing the individual register blocks as belonging to either the wrapper node or the PHY child nodes. This is an unnecessary level of detail which has lead to problems when later IP blocks using different register layouts have been forced to fit the original mould rather than updating the binding. The bindings are arguable also incomplete as they only the describe register blocks used by the current Linux drivers (e.g. does not include the per lane PCS registers). In preparation for adding new bindings for SC8280XP which further bindings can be based on, rename the current schema file after IPQ8074, which was the first SoC added to the bindings after MSM8996 (which has already been split out), and add a reference to the SC8280XP bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Johan Hovold --- ...om,qmp-pcie-phy.yaml => qcom,ipq8074-qmp-pcie-phy.yaml} | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) rename Documentation/devicetree/bindings/phy/{qcom,qmp-pcie-phy.yaml => qcom,ipq8074-qmp-pcie-phy.yaml} (96%) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml similarity index 96% rename from Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml rename to Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml index 324ad7d03a38..62045dcfb20c 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml @@ -1,10 +1,10 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml# +$id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm QMP PHY controller (PCIe) +title: Qualcomm QMP PHY controller (PCIe, IPQ8074) maintainers: - Vinod Koul @@ -13,6 +13,9 @@ description: QMP PHY controller supports physical layer functionality for a number of controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see + qcom,sc8280xp-qmp-pcie-phy.yaml. + properties: compatible: enum: