diff mbox series

[17/27] arm64: dts: mediatek: mt6795: Add MMSYS node for multimedia clocks

Message ID 20230412112739.160376-18-angelogioacchino.delregno@collabora.com
State Handled Elsewhere
Headers show
Series MediaTek Helio X10 - Mailbox, Display, MMC/SD/SDIO | expand

Commit Message

AngeloGioacchino Del Regno April 12, 2023, 11:27 a.m. UTC
Add the MultiMedia System node, providing clocks for the multimedia
hardware blocks and their IOMMU/SMIs.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Matthias Brugger May 29, 2023, 1:55 p.m. UTC | #1
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
> Add the MultiMedia System node, providing clocks for the multimedia
> hardware blocks and their IOMMU/SMIs.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt6795.dtsi | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> index 99cc4918e6ba..a8b2c4517e79 100644
> --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
> @@ -635,6 +635,19 @@ mmc3: mmc@11260000 {
>   			status = "disabled";
>   		};
>   
> +		mmsys: syscon@14000000 {
> +			compatible = "mediatek,mt6795-mmsys", "syscon";
> +			reg = <0 0x14000000 0 0x1000>;
> +			power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
> +			assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
> +			assigned-clock-rates = <400000000>;
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> +				 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> +			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> +		};
> +
>   		vdecsys: clock-controller@16000000 {
>   			compatible = "mediatek,mt6795-vdecsys";
>   			reg = <0 0x16000000 0 0x1000>;
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 99cc4918e6ba..a8b2c4517e79 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -635,6 +635,19 @@  mmc3: mmc@11260000 {
 			status = "disabled";
 		};
 
+		mmsys: syscon@14000000 {
+			compatible = "mediatek,mt6795-mmsys", "syscon";
+			reg = <0 0x14000000 0 0x1000>;
+			power-domains = <&spm MT6795_POWER_DOMAIN_MM>;
+			assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
+			assigned-clock-rates = <400000000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+				 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
+		};
+
 		vdecsys: clock-controller@16000000 {
 			compatible = "mediatek,mt6795-vdecsys";
 			reg = <0 0x16000000 0 0x1000>;