| Message ID | 20230521203834.22566-11-dmitry.baryshkov@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | phy: qcom-qmp-ufs: convert to newer style of bindings | expand |
On 21.05.2023 22:38, Dmitry Baryshkov wrote: > Change the UFS QMP PHY to use newer style of QMP PHY bindings (single > resource region, no per-PHY subnodes). > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++++++++++------------------ > 1 file changed, 10 insertions(+), 18 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi > index ebcb481571c2..6173521ff544 100644 > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi > @@ -656,9 +656,9 @@ gcc: clock-controller@100000 { > <0>, > <0>, > <0>, > - <&ufs_mem_phy_lanes 0>, > - <&ufs_mem_phy_lanes 1>, > - <&ufs_mem_phy_lanes 2>, > + <&ufs_mem_phy 0>, > + <&ufs_mem_phy 1>, > + <&ufs_mem_phy 2>, > <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, > <0>; > }; > @@ -1658,7 +1658,7 @@ ufs_mem_hc: ufshc@1d84000 { > "jedec,ufs-2.0"; > reg = <0 0x01d84000 0 0x3000>; > interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; > - phys = <&ufs_mem_phy_lanes>; > + phys = <&ufs_mem_phy>; > phy-names = "ufsphy"; > lanes-per-direction = <2>; > #reset-cells = <1>; > @@ -1702,10 +1702,8 @@ ufs_mem_hc: ufshc@1d84000 { > > ufs_mem_phy: phy@1d87000 { > compatible = "qcom,sm8350-qmp-ufs-phy"; > - reg = <0 0x01d87000 0 0x1c4>; > - #address-cells = <2>; > - #size-cells = <2>; > - ranges; > + reg = <0 0x01d87000 0 0x1000>; > + > clock-names = "ref", > "ref_aux"; > clocks = <&rpmhcc RPMH_CXO_CLK>, > @@ -1713,17 +1711,11 @@ ufs_mem_phy: phy@1d87000 { > > resets = <&ufs_mem_hc 0>; > reset-names = "ufsphy"; > - status = "disabled"; > > - ufs_mem_phy_lanes: phy@1d87400 { > - reg = <0 0x01d87400 0 0x188>, > - <0 0x01d87600 0 0x200>, > - <0 0x01d87c00 0 0x200>, > - <0 0x01d87800 0 0x188>, > - <0 0x01d87a00 0 0x200>; > - #clock-cells = <1>; > - #phy-cells = <0>; > - }; > + #clock-cells = <1>; > + #phy-cells = <0>; > + > + status = "disabled"; > }; > > ipa: ipa@1e40000 {
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index ebcb481571c2..6173521ff544 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -656,9 +656,9 @@ gcc: clock-controller@100000 { <0>, <0>, <0>, - <&ufs_mem_phy_lanes 0>, - <&ufs_mem_phy_lanes 1>, - <&ufs_mem_phy_lanes 2>, + <&ufs_mem_phy 0>, + <&ufs_mem_phy 1>, + <&ufs_mem_phy 2>, <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>; }; @@ -1658,7 +1658,7 @@ ufs_mem_hc: ufshc@1d84000 { "jedec,ufs-2.0"; reg = <0 0x01d84000 0 0x3000>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - phys = <&ufs_mem_phy_lanes>; + phys = <&ufs_mem_phy>; phy-names = "ufsphy"; lanes-per-direction = <2>; #reset-cells = <1>; @@ -1702,10 +1702,8 @@ ufs_mem_hc: ufshc@1d84000 { ufs_mem_phy: phy@1d87000 { compatible = "qcom,sm8350-qmp-ufs-phy"; - reg = <0 0x01d87000 0 0x1c4>; - #address-cells = <2>; - #size-cells = <2>; - ranges; + reg = <0 0x01d87000 0 0x1000>; + clock-names = "ref", "ref_aux"; clocks = <&rpmhcc RPMH_CXO_CLK>, @@ -1713,17 +1711,11 @@ ufs_mem_phy: phy@1d87000 { resets = <&ufs_mem_hc 0>; reset-names = "ufsphy"; - status = "disabled"; - ufs_mem_phy_lanes: phy@1d87400 { - reg = <0 0x01d87400 0 0x188>, - <0 0x01d87600 0 0x200>, - <0 0x01d87c00 0 0x200>, - <0 0x01d87800 0 0x188>, - <0 0x01d87a00 0 0x200>; - #clock-cells = <1>; - #phy-cells = <0>; - }; + #clock-cells = <1>; + #phy-cells = <0>; + + status = "disabled"; }; ipa: ipa@1e40000 {
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 ++++++++++------------------ 1 file changed, 10 insertions(+), 18 deletions(-)