diff mbox series

[v2,04/11] arm64: dts: qcom: msm8998: switch UFS QMP PHY to new style of bindings

Message ID 20230521203834.22566-5-dmitry.baryshkov@linaro.org
State Superseded
Headers show
Series phy: qcom-qmp-ufs: convert to newer style of bindings | expand

Commit Message

Dmitry Baryshkov May 21, 2023, 8:38 p.m. UTC 
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

Comments

Konrad Dybcio May 22, 2023, 4:59 p.m. UTC | #1 
On 21.05.2023 22:38, Dmitry Baryshkov wrote:
> Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 +++-------------
>  1 file changed, 3 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index b150437a8355..848fbd2cb3f8 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -980,7 +980,7 @@ ufshc: ufshc@1da4000 {
>  			compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
>  			reg = <0x01da4000 0x2500>;
>  			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> -			phys = <&ufsphy_lanes>;
> +			phys = <&ufsphy>;
>  			phy-names = "ufsphy";
>  			lanes-per-direction = <2>;
>  			power-domains = <&gcc UFS_GDSC>;
> @@ -1021,11 +1021,8 @@ ufshc: ufshc@1da4000 {
>  
>  		ufsphy: phy@1da7000 {
>  			compatible = "qcom,msm8998-qmp-ufs-phy";
> -			reg = <0x01da7000 0x18c>;
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> +			reg = <0x01da7000 0x1000>;
>  			status = "disabled";
> -			ranges;
>  
>  			clock-names =
>  				"ref",
> @@ -1037,14 +1034,7 @@ ufsphy: phy@1da7000 {
>  			reset-names = "ufsphy";
>  			resets = <&ufshc 0>;
>  
> -			ufsphy_lanes: phy@1da7400 {
> -				reg = <0x01da7400 0x128>,
> -				      <0x01da7600 0x1fc>,
> -				      <0x01da7c00 0x1dc>,
> -				      <0x01da7800 0x128>,
> -				      <0x01da7a00 0x1fc>;
> -				#phy-cells = <0>;
> -			};
> +			#phy-cells = <0>;
Looks like that will make status not-last?

Konrad
>  		};
>  
>  		tcsr_mutex: hwlock@1f40000 {
Dmitry Baryshkov May 22, 2023, 6:38 p.m. UTC | #2 
On 22/05/2023 19:59, Konrad Dybcio wrote:
> 
> 
> On 21.05.2023 22:38, Dmitry Baryshkov wrote:
>> Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
>> resource region, no per-PHY subnodes).
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/msm8998.dtsi | 16 +++-------------
>>   1 file changed, 3 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> index b150437a8355..848fbd2cb3f8 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> @@ -980,7 +980,7 @@ ufshc: ufshc@1da4000 {
>>   			compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
>>   			reg = <0x01da4000 0x2500>;
>>   			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
>> -			phys = <&ufsphy_lanes>;
>> +			phys = <&ufsphy>;
>>   			phy-names = "ufsphy";
>>   			lanes-per-direction = <2>;
>>   			power-domains = <&gcc UFS_GDSC>;
>> @@ -1021,11 +1021,8 @@ ufshc: ufshc@1da4000 {
>>   
>>   		ufsphy: phy@1da7000 {
>>   			compatible = "qcom,msm8998-qmp-ufs-phy";
>> -			reg = <0x01da7000 0x18c>;
>> -			#address-cells = <1>;
>> -			#size-cells = <1>;
>> +			reg = <0x01da7000 0x1000>;
>>   			status = "disabled";
>> -			ranges;
>>   
>>   			clock-names =
>>   				"ref",
>> @@ -1037,14 +1034,7 @@ ufsphy: phy@1da7000 {
>>   			reset-names = "ufsphy";
>>   			resets = <&ufshc 0>;
>>   
>> -			ufsphy_lanes: phy@1da7400 {
>> -				reg = <0x01da7400 0x128>,
>> -				      <0x01da7600 0x1fc>,
>> -				      <0x01da7c00 0x1dc>,
>> -				      <0x01da7800 0x128>,
>> -				      <0x01da7a00 0x1fc>;
>> -				#phy-cells = <0>;
>> -			};
>> +			#phy-cells = <0>;
> Looks like that will make status not-last?

It was not the last one beforehand, so I hesitated to move it. Let's fix it.

> 
> Konrad
>>   		};
>>   
>>   		tcsr_mutex: hwlock@1f40000 {
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index b150437a8355..848fbd2cb3f8 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -980,7 +980,7 @@  ufshc: ufshc@1da4000 {
 			compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
 			reg = <0x01da4000 0x2500>;
 			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-			phys = <&ufsphy_lanes>;
+			phys = <&ufsphy>;
 			phy-names = "ufsphy";
 			lanes-per-direction = <2>;
 			power-domains = <&gcc UFS_GDSC>;
@@ -1021,11 +1021,8 @@  ufshc: ufshc@1da4000 {
 
 		ufsphy: phy@1da7000 {
 			compatible = "qcom,msm8998-qmp-ufs-phy";
-			reg = <0x01da7000 0x18c>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			reg = <0x01da7000 0x1000>;
 			status = "disabled";
-			ranges;
 
 			clock-names =
 				"ref",
@@ -1037,14 +1034,7 @@  ufsphy: phy@1da7000 {
 			reset-names = "ufsphy";
 			resets = <&ufshc 0>;
 
-			ufsphy_lanes: phy@1da7400 {
-				reg = <0x01da7400 0x128>,
-				      <0x01da7600 0x1fc>,
-				      <0x01da7c00 0x1dc>,
-				      <0x01da7800 0x128>,
-				      <0x01da7a00 0x1fc>;
-				#phy-cells = <0>;
-			};
+			#phy-cells = <0>;
 		};
 
 		tcsr_mutex: hwlock@1f40000 {