@@ -234,6 +234,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
+
+imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd-dtbs += imx8qxp-mek.dtb imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb
new file mode 100644
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024 NXP
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/firmware/imx/rsrc.h>
+
+&{/} {
+ panel-lvds0 {
+ compatible = "koe,tx26d202vm0bwa";
+ backlight = <&backlight_lvds1>;
+ power-supply = <®_vcc_per_3v3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dual-lvds-odd-pixels;
+
+ panel_lvds0_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dual-lvds-even-pixels;
+
+ panel_lvds1_in: endpoint {
+ remote-endpoint = <&lvds1_out>;
+ };
+ };
+ };
+ };
+};
+
+&backlight_lvds1 {
+ status = "okay";
+};
+
+&dc0_framegen0 {
+ assigned-clocks = <&clk IMX_SC_R_DC_0_PLL_0 IMX_SC_PM_CLK_PLL>,
+ <&clk IMX_SC_R_DC_0 IMX_SC_PM_CLK_MISC0>;
+ assigned-clock-parents = <0>,
+ <&clk IMX_SC_R_DC_0_PLL_0 IMX_SC_PM_CLK_PLL>;
+ assigned-clock-rates = <940320000>;
+};
+
+&dc0_pixel_link0 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ status = "okay";
+ };
+ };
+};
+
+&dc0_pc {
+ status = "okay";
+
+ channel@0 {
+ status = "okay";
+ };
+};
+
+&mipi_lvds_0_ldb {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fsl,companion-ldb = <&mipi_lvds_1_ldb>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_lvds0_in>;
+ };
+ };
+ };
+};
+
+&mipi_lvds_0_phy {
+ status = "okay";
+};
+
+&mipi_lvds_0_pxl2dpi {
+ fsl,companion-pxl2dpi = <&mipi_lvds_1_pxl2dpi>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {
+ status = "okay";
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
+ status = "okay";
+ };
+ };
+ };
+};
+
+&mipi_lvds_1_ldb {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds1_out: endpoint {
+ remote-endpoint = <&panel_lvds1_in>;
+ };
+ };
+ };
+};
+
+&mipi_lvds_1_phy {
+ status = "okay";
+};
+
+&mipi_lvds_1_pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm_mipi_lvds1>;
+ status = "okay";
+};
+
+&mipi_lvds_1_pxl2dpi {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mipi_lvds_1_pxl2dpi_dc0_pixel_link0: endpoint@1 {
+ status = "okay";
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_lvds_1_pxl2dpi_mipi_lvds_1_ldb_ch1: endpoint@1 {
+ status = "okay";
+ };
+ };
+ };
+};
@@ -16,11 +16,35 @@ chosen {
stdout-path = &lpuart0;
};
+ backlight_lvds1: backlight-lvds1 {
+ compatible = "pwm-backlight";
+ pwms = <&mipi_lvds_1_pwm 0 100000 0>;
+ brightness-levels = <0 100>;
+ num-interpolated-steps = <100>;
+ default-brightness-level = <100>;
+ power-supply = <®_vcc_12v0>;
+ status = "disabled";
+ };
+
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
};
+ reg_vcc_12v0: regulator-vcc-12v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_12V0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ reg_vcc_per_3v3: regulator-vcc-per-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_PER_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
reg_usdhc2_vmmc: usdhc2-vmmc {
compatible = "regulator-fixed";
regulator-name = "SD1_SPWR";
@@ -497,6 +521,12 @@ IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020
>;
};
+ pinctrl_pwm_mipi_lvds1: mipilvds1pwmgrp {
+ fsl,pins = <
+ IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT 0x00000020
+ >;
+ };
+
pinctrl_typec: typecgrp {
fsl,pins = <
IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd and even pixels to the panel respectively. Signed-off-by: Liu Ying <victor.liu@nxp.com> --- v2: * New patch. (Francesco) arch/arm64/boot/dts/freescale/Makefile | 4 + .../imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso | 183 ++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 30 +++ 3 files changed, 217 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso