From patchwork Tue Sep 3 12:12:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 13788604 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 041A4CD13CF for ; Tue, 3 Sep 2024 12:16:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2pHfIrYmzBTjfyKKR+9md8dhRPQvURysIl/oDWzfRHY=; b=rhu8POtdJiXqOQ VYBnscBq8c3svb1NyEFf4OrwtV+BJy2BtZmaRgeAatriE42Jb9FmMufuuMcQhuN2D8NQL08NLmhrz LlynTG3gQfnidVrZD9DeFVYq2lNdRW/+prmBb2JPtbRSGCAxZq4ydwf8LljzuW6LsRENDkjUpP3bX cyiteFcZ4fEsqecx71TxJRcAc9KjG+cU5zNviS/ZKu27g4y5mvcV0mHaDpNSQKlLJintaOS7E2pTS Gc2itGUqO+ZxE2sAoML3FwQrV003yn39qHqGdioKb65p0t2JyUrlPOhcCz2uvm7vUaIVsPF9s7lNu lB9aDLh0xTNSNfbneO9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slSSc-000000006uZ-2w5X; Tue, 03 Sep 2024 12:16:38 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slSQY-000000005w2-3SXE; Tue, 03 Sep 2024 12:14:33 +0000 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4838ETle020717; Tue, 3 Sep 2024 14:14:16 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= EO0dFaFYKSYRNxiL0E0lJRqL8rB+a04HVSi9WweSut8=; b=J4+X05j96hxxgiCm +JRSAYzVoEkmc4PTs4DT//fDdKYldWAsFMPA9xUL8c4ra4I15Ak1FMx8BOriCcu+ NgyP9hwFbpkbh+x4mnVC8RAaukqbYREAiHiuAEXaN/WXGGhJ3hZR5EzeV7wSp+KL C+AjxvRLCeYEgAxFQu5Otrj8iPcu1/XM5cXGfgwJaN1o9yKn11+Pp4mfmKmtC6lt DopTCXiChOLw4v1POOUFu6HYuVo+WxtSzZi7RJLgeWaOd0TLX39nAs+LBEhyUYkr e2gg2Org/4d3am6xHy6Iljw0At7AJaOxeBgzSVQ8TZKy8q0MqTAIaF+o5ENTxjMU 9BO25g== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 41btgxvntf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 03 Sep 2024 14:14:15 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 53FDC40044; Tue, 3 Sep 2024 14:14:11 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 28C9724E1ED; Tue, 3 Sep 2024 14:13:23 +0200 (CEST) Received: from localhost (10.129.178.212) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 3 Sep 2024 14:13:22 +0200 From: Christian Bruel To: , , , , , , , CC: , , , , , , Christian Bruel Subject: [PATCH v5 1/5] dt-bindings: phy: Add STM32MP25 COMBOPHY bindings Date: Tue, 3 Sep 2024 14:12:59 +0200 Message-ID: <20240903121303.2953150-2-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903121303.2953150-1-christian.bruel@foss.st.com> References: <20240903121303.2953150-1-christian.bruel@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.129.178.212] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-02_06,2024-09-03_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240903_051431_390233_48DA09F7 X-CRM114-Status: GOOD ( 15.53 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Document the bindings for STM32 COMBOPHY interface, used to support the PCIe and USB3 stm32mp25 drivers. Following entries can be used to tune caracterisation parameters - st,output-micro-ohms and st,output-vswing-microvolt bindings entries to tune the impedance and voltage swing using discrete simulation results - st,rx-equalizer register to set the internal rx equalizer filter value. Signed-off-by: Christian Bruel Reviewed-by: Rob Herring (Arm) --- .../bindings/phy/st,stm32mp25-combophy.yaml | 119 ++++++++++++++++++ 1 file changed, 119 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml diff --git a/Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml b/Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml new file mode 100644 index 000000000000..a2e82c0bb56b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY + +maintainers: + - Christian Bruel + +description: + Single lane PHY shared (exclusive) between the USB3 and PCIe controllers. + Supports 5Gbit/s for USB3 and PCIe gen2 or 2.5Gbit/s for PCIe gen1. + +properties: + compatible: + const: st,stm32mp25-combophy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + + clocks: + minItems: 2 + items: + - description: apb Bus clock mandatory to access registers. + - description: ker Internal RCC reference clock for USB3 or PCIe + - description: pad Optional on board clock input for PCIe only. Typically an + external 100Mhz oscillator wired on dedicated CLKIN pad. Used as reference + clock input instead of the ker + + clock-names: + minItems: 2 + items: + - const: apb + - const: ker + - const: pad + + resets: + maxItems: 1 + + reset-names: + const: phy + + power-domains: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + description: interrupt used for wakeup + + access-controllers: + maxItems: 1 + description: Phandle to the rifsc device to check access right. + + st,ssc-on: + $ref: /schemas/types.yaml#/definitions/flag + description: + A property whose presence indicates that the Spread Spectrum Clocking is active. + + st,rx-equalizer: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + default: 2 + description: + A 3 bit value to tune the RX fixed equalizer setting for optimal eye compliance + + st,output-micro-ohms: + minimum: 3999000 + maximum: 6090000 + default: 4968000 + description: + A value property to tune the Single Ended Output Impedance, simulations results + at 25C for a VDDP=0.8V. The hardware accepts discrete values in this range. + + st,output-vswing-microvolt: + minimum: 442000 + maximum: 803000 + default: 803000 + description: + A value property in microvolt to tune the Single Ended Output Voltage Swing to change the + Vlo, Vhi for a VDDP = 0.8V. The hardware accepts discrete values in this range. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + + phy@480c0000 { + compatible = "st,stm32mp25-combophy"; + reg = <0x480c0000 0x1000>; + #phy-cells = <1>; + clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>; + clock-names = "apb", "ker"; + resets = <&rcc USB3PCIEPHY_R>; + reset-names = "phy"; + access-controllers = <&rifsc 67>; + power-domains = <&CLUSTER_PD>; + wakeup-source; + interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>; + };