From patchwork Wed Sep 11 01:28:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 13799598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0DF6FEE01FB for ; Wed, 11 Sep 2024 01:29:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bP0pMiGTpz8Kgxv6fqbtPuM62Q1l2bW4PTH0ZTkRg/o=; b=ak92NOi/9KKtqk JOsEGJ6yHDRDGOfefSyTX2mje3a+xQF9HUVKTICyXy+8vvifRNvpktpRpCOu5I8q88FeboZLXmwtG lyvNefxd3JKqhbfZXtYPJDeavOCNIszgUjQ5XuA9XCAG6K2GexKkBAmpEVYMPLEdfzB9dWUPjoEel dAcVhQpAr8S22mMRg79QCb/gox4TJ7nKFnraPTOC5kqxw3KcNdLLUMeA6tacDE40IR9S/hH1+zdMm lL4y1x4nM5gdqKjhaJZeIWbRatiUwjJboeYdLkdcym6ETvefAm4nC3t1jfRwjO9VLI1zIn1yIwHvP nbVr/rL3mxHweBnClCvA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1soCAq-00000007h5g-2QD1; Wed, 11 Sep 2024 01:29:36 +0000 Received: from mail-io1-xd33.google.com ([2607:f8b0:4864:20::d33]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1soCAo-00000007h4O-0cDM for linux-phy@lists.infradead.org; Wed, 11 Sep 2024 01:29:35 +0000 Received: by mail-io1-xd33.google.com with SMTP id ca18e2360f4ac-82aa7c3b498so15178139f.1 for ; Tue, 10 Sep 2024 18:29:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726018173; x=1726622973; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qNmd7Xeflt1tT296+u/RQ2hpS1vjveVrr0E47o0mBJI=; b=YLQeln5EtwzH3CU3p5SJPUVvfYDX2dYrf1OF5sEB4F2q4tP9dz9hh6MU4KuiGSpqt6 2p053mgOs755N1/9hJFuJ9NSJ/OUs63FvlEpygr6zzM5MrbM6ELA+4emZnm6zlpI7KdH m8acLXb44NdLN/fHR55pXHLYNCCkiA/UT4BqjKUu9gfxow7mvHsZuL5maZfS9L0CWY00 iu2BqX92GqdtqpVMpM6qfoxlRxPGV3Cq6a3OLPm5htChYa0VLz3W+m9C89Nm0pWScPvE kV6vz/TubXoMxvT+epqwCCaRelFA46F3Bq/2wAN2lyUC8/Q8Pgega8gKUVRQkDDIHluW VOOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726018173; x=1726622973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qNmd7Xeflt1tT296+u/RQ2hpS1vjveVrr0E47o0mBJI=; b=wlCkC3xe85op6ftNFDBkZHH5Ety7eeD+FcXefg7OVhGeK+NDCuid2nMTCK0TToXeGD cuzaFmba43OPeKI3q5oMWpmxGC5bkg8/hkc4jt7HLXzZU4fUNGwjhkWFEWNOoRIl5B5O P+yUoGWsQRn1iWwTfIA0A4aDuWjT/pZx0SrsMtP22nGPhaRWPRIY6J/nJYndc8CWVlZl bp3PEH5giQ4qsf+V9p9n8K3RwlXwVQKxhvL4n/95/wfVc+0Jtd6LVlJcdruXWpzJfIIB LnrXc8mVeFUlTTTouWG9N2BYm7D/fbyyNPNpgfjG6v/+LUlFpJBKMRhAJfigWh8cHE3E 6TrA== X-Gm-Message-State: AOJu0YxOkB/jRDL8IGzBkCXaxDFuLK6E/3IiTfcQ04BicIL7IEv3lYfg EZXbUDyWCeyyv488g924QrRaSpbM9UwFiv/euayacbDiej4wbHHg3ULPdw== X-Google-Smtp-Source: AGHT+IENblEup5aBDflSVAc//Eq7RuqhMDHKRxCuG6xjyZyvg1MVVvZDliUQb3Su+5616U9ZKDqiiA== X-Received: by 2002:a05:6e02:1d88:b0:39f:5def:a23d with SMTP id e9e14a558f8ab-3a074c1d7e5mr10919985ab.5.1726018172880; Tue, 10 Sep 2024 18:29:32 -0700 (PDT) Received: from aford-System-Version.lan (c-75-72-166-104.hsd1.mn.comcast.net. [75.72.166.104]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4d094561c8csm1917945173.62.2024.09.10.18.29.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2024 18:29:30 -0700 (PDT) From: Adam Ford To: linux-phy@lists.infradead.org Cc: dominique.martinet@atmark-techno.com, linux-imx@nxp.com, festevam@gmail.com, frieder.schrempf@kontron.de, aford@beaconembedded.com, Sandor.yu@nxp.com, Adam Ford , Vinod Koul , Kishon Vijay Abraham I , Marco Felsch , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lucas Stach , linux-kernel@vger.kernel.org Subject: [PATCH V7 5/5] phy: freescale: fsl-samsung-hdmi: Remove unnecessary LUT entries Date: Tue, 10 Sep 2024 20:28:11 -0500 Message-ID: <20240911012838.944630-6-aford173@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240911012838.944630-1-aford173@gmail.com> References: <20240911012838.944630-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240910_182934_211176_4EE6E20A X-CRM114-Status: GOOD ( 10.76 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The lookup table contains entries which use the integer divider instead of just the fractional divider. Since the set and round functions check both the integer divider values and the LUT values, it's no longer necessary to keep the integer divider values in the lookup table, as can be dynamically calcuated. Signed-off-by: Adam Ford Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf Reviewed-by: Dominique Martinet Tested-by: Dominique Martinet --- V7: No Change V6: Fix typos in commit message V5: No Change V4: New to series --- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 83 +++----------------- 1 file changed, 13 insertions(+), 70 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 67a28aac9c45..a5ad51425ee3 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -69,25 +69,16 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 23750000, .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40 }, - }, { - .pixclk = 24000000, - .pll_div_regs = { 0xd1, 0x50, 0xf0, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk = 24024000, .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40 }, }, { .pixclk = 25175000, .pll_div_regs = { 0xd1, 0x54, 0xfc, 0xcc, 0x91, 0x80, 0x40 }, - }, { - .pixclk = 25200000, - .pll_div_regs = { 0xd1, 0x54, 0xf0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 26750000, .pll_div_regs = { 0xd1, 0x5a, 0xf2, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk = 27000000, - .pll_div_regs = { 0xd1, 0x5a, 0xf0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 27027000, .pll_div_regs = { 0xd1, 0x5a, 0xf2, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -105,18 +96,9 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 35000000, .pll_div_regs = { 0xd1, 0x58, 0xb8, 0x8b, 0x88, 0x80, 0x40 }, - }, { - .pixclk = 36000000, - .pll_div_regs = { 0xd1, 0x5a, 0xb0, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 36036000, .pll_div_regs = { 0xd1, 0x5a, 0xb2, 0xfd, 0x0c, 0x80, 0x40 }, - }, { - .pixclk = 40000000, - .pll_div_regs = { 0xd1, 0x64, 0xb0, 0x00, 0x00, 0x80, 0x00 }, - }, { - .pixclk = 43200000, - .pll_div_regs = { 0xd1, 0x5a, 0x90, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk = 43243200, .pll_div_regs = { 0xd1, 0x5a, 0x92, 0xfd, 0x0c, 0x80, 0x40 }, @@ -132,19 +114,13 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 50349650, .pll_div_regs = { 0xd1, 0x54, 0x7c, 0xc3, 0x8f, 0x80, 0x40 }, - }, { - .pixclk = 50400000, - .pll_div_regs = { 0xd1, 0x54, 0x70, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk = 53250000, .pll_div_regs = { 0xd1, 0x58, 0x72, 0x84, 0x03, 0x82, 0x41 }, }, { .pixclk = 53500000, .pll_div_regs = { 0xd1, 0x5a, 0x72, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk = 54000000, - .pll_div_regs = { 0xd1, 0x5a, 0x70, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 54054000, .pll_div_regs = { 0xd1, 0x5a, 0x72, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -153,10 +129,7 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 59340659, .pll_div_regs = { 0xd1, 0x62, 0x74, 0xdb, 0x52, 0x88, 0x47 }, - }, { - .pixclk = 59400000, - .pll_div_regs = { 0xd1, 0x63, 0x70, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 61500000, .pll_div_regs = { 0xd1, 0x66, 0x74, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -168,10 +141,7 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 70000000, .pll_div_regs = { 0xd1, 0x58, 0x58, 0x8b, 0x88, 0x80, 0x40 }, - }, { - .pixclk = 72000000, - .pll_div_regs = { 0xd1, 0x5a, 0x50, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 72072000, .pll_div_regs = { 0xd1, 0x5a, 0x52, 0xfd, 0x0c, 0x80, 0x40 }, }, { @@ -183,10 +153,7 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 78500000, .pll_div_regs = { 0xd1, 0x62, 0x54, 0x87, 0x01, 0x80, 0x40 }, - }, { - .pixclk = 80000000, - .pll_div_regs = { 0xd1, 0x64, 0x50, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 82000000, .pll_div_regs = { 0xd1, 0x66, 0x54, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -213,10 +180,7 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 100699300, .pll_div_regs = { 0xd1, 0x54, 0x3c, 0xc3, 0x8f, 0x80, 0x40 }, - }, { - .pixclk = 100800000, - .pll_div_regs = { 0xd1, 0x54, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 102500000, .pll_div_regs = { 0xd1, 0x55, 0x32, 0x8c, 0x05, 0x90, 0x4b }, }, { @@ -228,19 +192,13 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 107000000, .pll_div_regs = { 0xd1, 0x5a, 0x32, 0x89, 0x88, 0x80, 0x40 }, - }, { - .pixclk = 108000000, - .pll_div_regs = { 0xd1, 0x5a, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 108108000, .pll_div_regs = { 0xd1, 0x5a, 0x32, 0xfd, 0x0c, 0x80, 0x40 }, }, { .pixclk = 118000000, .pll_div_regs = { 0xd1, 0x62, 0x34, 0x95, 0x08, 0x80, 0x40 }, - }, { - .pixclk = 118800000, - .pll_div_regs = { 0xd1, 0x63, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 123000000, .pll_div_regs = { 0xd1, 0x66, 0x34, 0x82, 0x01, 0x88, 0x45 }, }, { @@ -261,10 +219,7 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 140000000, .pll_div_regs = { 0xd1, 0x75, 0x36, 0xa7, 0x90, 0x80, 0x40 }, - }, { - .pixclk = 144000000, - .pll_div_regs = { 0xd1, 0x78, 0x30, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 148352000, .pll_div_regs = { 0xd1, 0x7b, 0x35, 0xdb, 0x39, 0x90, 0x45 }, }, { @@ -288,9 +243,6 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 165000000, .pll_div_regs = { 0xd1, 0x45, 0x11, 0x84, 0x81, 0x90, 0x4b }, - }, { - .pixclk = 180000000, - .pll_div_regs = { 0xd1, 0x4b, 0x10, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk = 185625000, .pll_div_regs = { 0xd1, 0x4e, 0x12, 0x9a, 0x95, 0x80, 0x40 }, @@ -309,25 +261,16 @@ static const struct phy_config phy_pll_cfg[] = { }, { .pixclk = 213000000, .pll_div_regs = { 0xd1, 0x58, 0x12, 0x84, 0x03, 0x82, 0x41 }, - }, { - .pixclk = 216000000, - .pll_div_regs = { 0xd1, 0x5a, 0x10, 0x00, 0x00, 0x80, 0x00 }, }, { .pixclk = 216216000, .pll_div_regs = { 0xd1, 0x5a, 0x12, 0xfd, 0x0c, 0x80, 0x40 }, - }, { - .pixclk = 237600000, - .pll_div_regs = { 0xd1, 0x63, 0x10, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 254000000, .pll_div_regs = { 0xd1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40 }, }, { .pixclk = 277500000, .pll_div_regs = { 0xd1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4d }, - }, { - .pixclk = 288000000, - .pll_div_regs = { 0xd1, 0x78, 0x10, 0x00, 0x00, 0x80, 0x00 }, - }, { + }, { .pixclk = 297000000, .pll_div_regs = { 0xd1, 0x7b, 0x15, 0x84, 0x03, 0x90, 0x45 }, },