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Fri, 04 Oct 2024 10:30:51 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 494AUbuP005260; Fri, 4 Oct 2024 10:30:51 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-mukhopad-hyd.qualcomm.com [10.147.244.250]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 494AUo4i005788; Fri, 04 Oct 2024 10:30:50 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 3978529) id CE2FE5009EF; Fri, 4 Oct 2024 16:00:48 +0530 (+0530) From: Soutrik Mukhopadhyay To: vkoul@kernel.org, kishon@kernel.org, konradybcio@kernel.org, andersson@kernel.org, simona@ffwll.ch, dmitry.baryshkov@linaro.org, abel.vesa@linaro.org, robdclark@gmail.com, quic_abhinavk@quicinc.com, sean@poorly.run, marijn.suijten@somainline.org, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quic_khsieh@quicinc.com, konrad.dybcio@linaro.org, quic_parellan@quicinc.com, quic_bjorande@quicinc.com Cc: Soutrik Mukhopadhyay , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, quic_riteshk@quicinc.com, quic_vproddut@quicinc.com Subject: [PATCH v4 5/5] drm/msm/dp: Add DisplayPort controller for SA8775P Date: Fri, 4 Oct 2024 16:00:46 +0530 Message-Id: <20241004103046.22209-6-quic_mukhopad@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241004103046.22209-1-quic_mukhopad@quicinc.com> References: <20241004103046.22209-1-quic_mukhopad@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 0U8tKL-V8NF6DtQG7pdjq1yc3iy9PwvH X-Proofpoint-GUID: 0U8tKL-V8NF6DtQG7pdjq1yc3iy9PwvH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 clxscore=1015 bulkscore=0 malwarescore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410040076 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_033123_997620_0457517A X-CRM114-Status: GOOD ( 11.36 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The Qualcomm SA8775P platform comes with 2 DisplayPort controllers for each mdss, having different base offsets than the previous SoCs. The support for all 4 DPTX have been added here, and validation of only MDSS0 DPTX0 and DPTX1 have been conducted. Reviewed-by: Dmitry Baryshkov Signed-off-by: Soutrik Mukhopadhyay --- v2: No change v3: Fixed review comments from Konrad and Bjorn -Added all the necessary DPTX controllers for this platform. v4: Updated commit message --- drivers/gpu/drm/msm/dp/dp_display.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index e1228fb093ee..2195779584dc 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -118,6 +118,14 @@ struct msm_dp_desc { bool wide_bus_supported; }; +static const struct msm_dp_desc sa8775p_dp_descs[] = { + { .io_start = 0xaf54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, + { .io_start = 0xaf5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true }, + { .io_start = 0x22154000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true }, + { .io_start = 0x2215c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true }, + {} +}; + static const struct msm_dp_desc sc7180_dp_descs[] = { { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true }, {} @@ -162,6 +170,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = { }; static const struct of_device_id dp_dt_match[] = { + { .compatible = "qcom,sa8775p-dp", .data = &sa8775p_dp_descs }, { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs },