| Message ID | 20241126092050.1825607-13-claudiu.beznea.uj@bp.renesas.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add initial USB support for the Renesas RZ/G3S SoC | expand |
Hi Claudiu, Thanks for your patch! On Tue, Nov 26, 2024 at 10:21 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > The system controller on RZ/G3S can provide control access to its signals. Actually all SoCs from the "RZ/G2L" family... > To enable this, add the #renesas,sysc-signal-cells DT property. Consumers > can use the renesas,sysc-signal DT property to reference the specific SYSC > signal that needs to be controlled. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > > Changes in v2: > - none; this patch is new > > > arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 3 ++- > arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 3 ++- > arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 3 ++- > arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 3 ++- Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 593c66b27ad1..2ebb951e6a39 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -585,8 +585,9 @@ cpg: clock-controller@11010000 { }; sysc: system-controller@11020000 { - compatible = "renesas,r9a07g043-sysc"; + compatible = "renesas,r9a07g043-sysc", "syscon"; reg = <0 0x11020000 0 0x10000>; + #renesas,sysc-signal-cells = <2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 6b1c77cd8261..9dd229cbf288 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -877,7 +877,7 @@ cpg: clock-controller@11010000 { }; sysc: system-controller@11020000 { - compatible = "renesas,r9a07g044-sysc"; + compatible = "renesas,r9a07g044-sysc", "syscon"; reg = <0 0x11020000 0 0x10000>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, @@ -885,6 +885,7 @@ sysc: system-controller@11020000 { <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int", "ca55_deny"; + #renesas,sysc-signal-cells = <2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi index 01f59914dd09..31550b8c3143 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi @@ -884,7 +884,7 @@ cpg: clock-controller@11010000 { }; sysc: system-controller@11020000 { - compatible = "renesas,r9a07g054-sysc"; + compatible = "renesas,r9a07g054-sysc", "syscon"; reg = <0 0x11020000 0 0x10000>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, @@ -892,6 +892,7 @@ sysc: system-controller@11020000 { <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int", "ca55_deny"; + #renesas,sysc-signal-cells = <2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index be8a0a768c65..169561386f35 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -198,7 +198,7 @@ cpg: clock-controller@11010000 { }; sysc: system-controller@11020000 { - compatible = "renesas,r9a08g045-sysc"; + compatible = "renesas,r9a08g045-sysc", "syscon"; reg = <0 0x11020000 0 0x10000>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, @@ -206,6 +206,7 @@ sysc: system-controller@11020000 { <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int", "ca55_deny"; + #renesas,sysc-signal-cells = <2>; status = "disabled"; };