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[81.240.10.146]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438904625f5sm64954515e9.28.2025.01.18.02.22.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Jan 2025 02:22:24 -0800 (PST) From: Philippe Simons To: Vinod Koul , Kishon Vijay Abraham I , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Philippe Simons , linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Allwinner sunXi SoC support), linux-sunxi@lists.linux.dev (open list:ARM/Allwinner sunXi SoC support), linux-kernel@vger.kernel.org (open list) Subject: [RFC PATCH 1/3] phy: don't let controllers change vbus reg Date: Sat, 18 Jan 2025 11:22:04 +0100 Message-ID: <20250118102207.9339-1-simons.philippe@gmail.com> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250118_022227_541357_20A9012A X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Allwinners SoCs share phy0 between the MUSB controller and HCI controller. If we let these controllers independently power on the vbus on that phy, peripheral mode is dangerous because HCI never power down the phy, resulting in 5v being applied against the host 5v. Override power_on/off for phy0 in that case, and let regulator be enabled/disabled based on id_det only. Signed-off-by: Philippe Simons --- drivers/phy/allwinner/phy-sun4i-usb.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index b0f19e950..24fbabe7a 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -465,6 +465,10 @@ static int sun4i_usb_phy_power_on(struct phy *_phy) struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); int ret; + /* phy0 power is controlled by sun4i_usb_phy0_reroute and id_det state */ + if (phy->index == 0 && data->cfg->phy0_dual_route) + return 0; + if (!phy->vbus || phy->regulator_on) return 0; @@ -493,6 +497,10 @@ static int sun4i_usb_phy_power_off(struct phy *_phy) struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); + /* phy0 power is controlled by sun4i_usb_phy0_reroute and id_det state */ + if (phy->index == 0 && data->cfg->phy0_dual_route) + return 0; + if (!phy->vbus || !phy->regulator_on) return 0; @@ -573,9 +581,21 @@ static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det) if (id_det == 0) { /* Host mode. Route phy0 to EHCI/OHCI */ regval &= ~OTGCTL_ROUTE_MUSB; + + /* Enable VBUS reg */ + if (phy->vbus && !phy->regulator_on) { + regulator_enable(phy->vbus); + phy->regulator_on = true; + } } else { /* Peripheral mode. Route phy0 to MUSB */ regval |= OTGCTL_ROUTE_MUSB; + + /* Disable VBUS reg */ + if (phy->vbus && phy->regulator_on) { + regulator_disable(phy->vbus); + phy->regulator_on = false; + } } writel(regval, data->base + REG_PHY_OTGCTL); } @@ -603,6 +623,12 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work) return; } + /* Disable internal VBUS reg if there is an external VBUS */ + if (vbus_det != 0 && phy->vbus && phy->regulator_on) { + regulator_disable(phy->vbus); + phy->regulator_on = false; + } + force_session_end = data->force_session_end; data->force_session_end = false;