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Mon, 13 Jan 2025 09:49:47 +0800 X-QQ-mid: xmsmtpt1736732987tlnicdyyr Message-ID: X-QQ-XMAILINFO: NhUkPfKlCtQw1LcvAHNy2LFYdmigRykKButUTi/h72vLRDRz83stPeYt9CbrIg IqXnKmHDwP1eJMoijiQvkpY2zWcDBVhTAGnZnJ/01V3ajbDVPTDHvVJMVRhAa37+wFaVrDUeFAwH Tha+o2TcjCqLZzmct3wua9uprQ389rotU1eeCtRnMBNZ5oUR9yWmjJ1fZnzgbhWqIUckPj4/e8GT wAdOUocRTxqTypi7g2wva5AIHF58STz9qgG0v9W7Wu4vxL9ubL9Otty5UUPuGmZRHjghmsu28Btw t3Akp87jPInF1DbqbepwARufR9vvqZKe+pYQooDwQO5vGcgQpapxHyVf5GTFJc18gemBEP6yKjAD N4oXSWo3f/ruoTpuoYuBg4fxu0AsTmTFETsRQgMjGrnGu7oSfZcuoc2y5Exo7PzBj7geHU5ZCypJ qwXWKg1cnJ0KbMA19mOwb/gVy8hLPMJt8nspFOIm+iw0zfEWAZmCZ91EcHJg11AyzIbjrFf9TOQt XPfqeePCgPMaOSQ74xZMkfDaBdnmmctPEXCy/2CFZXp6vOS7Buz4ktjsanmR/LyESUOx1OqKY+fR KPNPn90xPl0zg2b+FJdag4IOUH2Z63yRLMjnCU7tk0Nje2FvvsPQTzsIIhcps5EpMwV0Wt4ddVY7 wd2oE5ERWrdx2znplqG2ih8aEo8OvKKHJkcN2l2UIoQKJp7Bl6PPtZJHqS2GeLOd5idZbY4e0/RX i7+wGZ9OTupTOmShSeL8soYOUtR1WTdEekjRBywl51z37UE75q4e4CLy1EZdPDhWeSbrhBpoMBAN ZoHeopD2xRHTX4TK/J0mpEbkzey4hvt+ACdsuC4WdHZYaIIGoD0izi4V0QecwVkSnag3yq9Vt0rI XpDdKSd7WhI5NhsKQSZtgA8LFzt1Sz5bE01eErE+zcQ6WxmIlx1xRMqbpeTk7vHMseq321avtyND lkNchnXss= X-QQ-XMRINFO: NI4Ajvh11aEj8Xl/2s1/T8w= From: xiaopeitux@foxmail.com To: vkoul@kernel.org, aford173@gmail.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, geert@linux-m68k.org Cc: Pei Xiao Subject: [PATCH V4] phy: freescale: fsl-samsung-hdmi: fix build error in fsl_samsung_hdmi_phy_configure_pll_lock_det Date: Mon, 13 Jan 2025 09:49:45 +0800 X-OQ-MSGID: <09d7d47f579b9e820b7fddcb80cf0457361fb482.1736732159.git.xiaopei01@kylinos.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250112_175045_051686_2D4FE70C X-CRM114-Status: GOOD ( 10.75 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org From: Pei Xiao FIELD_PREP() checks that a value fits into the available bitfield, but the index div equals to 4,is out of range. which gcc complains about: In function ‘fsl_samsung_hdmi_phy_configure_pll_lock_det’, inlined from ‘fsl_samsung_hdmi_phy_configure’ at drivers/phy/freescale/phy-fsl-samsung-hdmi.c :470:2: ././include/linux/compiler_types.h:542:38: error: call to ‘__compiletime_assert_538’ declared with attribute error: FIELD_PREP: value too large for the field 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^ ././include/linux/compiler_types.h:523:4: note: in definition of macro ‘__compiletime_assert’ 523 | prefix ## suffix(); | ^~~~~~ ././include/linux/compiler_types.h:542:2: note: in expansion of macro ‘_compiletime_assert’ 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) REG12_CK_DIV_MASK only two bit, limit div to range 0~3, so build error will fix. Fixes: d567679f2b6a ("phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation") Signed-off-by: Pei Xiao Changlog: --- V4: change to use if statement V3: change to use do-while V2: change to use logical AND --- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 5eac70a1e858..1a079075de67 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -325,7 +325,7 @@ to_fsl_samsung_hdmi_phy(struct clk_hw *hw) return container_of(hw, struct fsl_samsung_hdmi_phy, hw); } -static void +static int fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, const struct phy_config *cfg) { @@ -341,6 +341,9 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, break; } + if (unlikely(div == 4)) + return -EINVAL; + writeb(FIELD_PREP(REG12_CK_DIV_MASK, div), phy->regs + PHY_REG(12)); /* @@ -364,6 +367,8 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, FIELD_PREP(REG14_RP_CODE_MASK, 2) | FIELD_PREP(REG14_TG_CODE_HIGH_MASK, fld_tg_code >> 8), phy->regs + PHY_REG(14)); + + return 0; } static unsigned long fsl_samsung_hdmi_phy_find_pms(unsigned long fout, u8 *p, u16 *m, u8 *s) @@ -467,7 +472,9 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + ret = fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + if (ret) + dev_err(phy->dev, "pixclock too large\n"); writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG(33));