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[v5,0/3] Add support for NVIDIA Tegra SoC core power domain

Message ID 20210516231755.24193-1-digetx@gmail.com (mailing list archive)
Headers show
Series Add support for NVIDIA Tegra SoC core power domain | expand


Dmitry Osipenko May 16, 2021, 11:17 p.m. UTC
Add GENPD driver for the core power domain of NVIDIA Tegra SoCs. It's
needed for enabling of SoC core voltage scaling, resolving overheating
problems of the Tegra SoCs.

Note that this series is made on top of [1]. It doesn't have any other
dependencies, core PD and voltage scaling will become active once all
other related patches will be applied, meaning that this series could be
applied at any time.

[1] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=244075

These and other power-related patches got more testing on more devices,
like Transformer and Lenovo tablets. I haven't updated tested-bys since
these devices are out-of-tree yet.

Ouya Tegra30 game console runs at 40C during system idle in oppose
to going over 60C with the enabled core voltage scaling. Matt Merhar
collected temperature stats on his Ouya [2], showing a very significant

[2] https://imgur.com/a/z4NDWqk


v5: - The core power domain node is now placed within the PMC PDs.
      This was suggested by Thierry Reding to v4, we don't need to
      add a virtual device-tree node for the domain anymore.

v4: - Rebased on top of a new version of the OPP patches [1].

    - Fixed new DT binding warning which was reported by the bot for v3.

v3: - This series is a continuation of [3][4]. I factored out and grouped
      these soc/tegra patches since they have a common dependency on the
      OPP API patches [1] and the rest of PM patches depend on this series.

      [3] https://lore.kernel.org/lkml/20201217180638.22748-1-digetx@gmail.com/
      [4] https://lore.kernel.org/linux-pm/20210121191410.13781-1-digetx@gmail.com/

    - Added locking around regulators syncing, which was previously done by
      the OPP core, but then we (me and Viresh) figured out that it will be
      better to do it within the PD driver.

    - The Core-PD driver now restores the boot voltage level before
      shutdown/reboot, which may help some devices not to hang on reboot,
      like Nexus 7 for example.

    - Added r-b from Ulf Hansson to "regulators: Support Core domain state
      syncing" patch, which he gave to v2.

    - It should be cleaner to add the Core OPP tables and power domain to
      the device-trees once all drivers will get the PM support, so this
      series adds the driver and the binding for now.

    - Added t-b from Paul Fertser, who tested the complete patchset on his
      AC100 netbook and helped to spot compatibility problem with older DTBs
      in the patch that will add PM support to the GPU driver.

    - The DT binding now follows the power-domain spec, which was suggested
      by Krzysztof Kozlowski in his comment to v2.

Dmitry Osipenko (3):
  dt-bindings: soc: tegra-pmc: Document core power domain
  soc/tegra: pmc: Add core power domain
  soc/tegra: regulators: Support Core domain state syncing

 .../arm/tegra/nvidia,tegra20-pmc.yaml         |  35 +++++
 drivers/soc/tegra/Kconfig                     |  14 ++
 drivers/soc/tegra/pmc.c                       | 143 ++++++++++++++++++
 drivers/soc/tegra/regulators-tegra20.c        |  19 ++-
 drivers/soc/tegra/regulators-tegra30.c        |  18 ++-
 include/soc/tegra/common.h                    |   6 +
 6 files changed, 233 insertions(+), 2 deletions(-)