From patchwork Fri Apr 8 05:21:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johnson Wang X-Patchwork-Id: 12806127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B235AC433FE for ; Fri, 8 Apr 2022 05:23:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234496AbiDHFZX (ORCPT ); Fri, 8 Apr 2022 01:25:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234701AbiDHFZS (ORCPT ); Fri, 8 Apr 2022 01:25:18 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1586122201; Thu, 7 Apr 2022 22:23:13 -0700 (PDT) X-UUID: 9d04cdf6699e4e189e4cbf124821d550-20220408 X-UUID: 9d04cdf6699e4e189e4cbf124821d550-20220408 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1811526773; Fri, 08 Apr 2022 13:23:05 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 13:23:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 13:23:05 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang Subject: [PATCH v2 0/2] Introduce MediaTek CCI devfreq driver Date: Fri, 8 Apr 2022 13:21:48 +0800 Message-ID: <20220408052150.22536-1-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The Cache Coherent Interconnect (CCI) is the management of cache coherency by hardware. CCI DEVFREQ is DVFS driver for power saving by scaling clock frequency and supply voltage of CCI. CCI uses the same input clock source and power rail as LITTLE CPUs on Mediatek SoCs. This series depends on: Chanwoo's repo: kernel/git/chanwoo/linux.git branch: devfreq-testing [1]: PM / devfreq: Export devfreq_get_freq_range symbol within devfreq [2]: PM / devfreq: Add cpu based scaling support to passive governor [3]: PM / devfreq: passive: Reduce duplicate code when passive_devfreq case [4]: PM / devfreq: passive: Update frequency when start governor Changes in v2: - Take MT8183 as example in binding document. - Use dev_err() instead of pr_err(). - Use 'goto' statement to handle error case. - Clean up driver code. Johnson Wang (2): dt-bindings: devfreq: mediatek: Add mtk cci devfreq dt-bindings PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver .../devicetree/bindings/devfreq/mtk-cci.yaml | 72 +++ drivers/devfreq/Kconfig | 10 + drivers/devfreq/Makefile | 1 + drivers/devfreq/mtk-cci-devfreq.c | 479 ++++++++++++++++++ 4 files changed, 562 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml create mode 100644 drivers/devfreq/mtk-cci-devfreq.c