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[0/4] cpufreq: qcom-hw: LMH irq/hotplug interractions

Message ID 20220615144321.262773-1-pierre.gondois@arm.com (mailing list archive)
Headers show
Series cpufreq: qcom-hw: LMH irq/hotplug interractions | expand

Message

Pierre Gondois June 15, 2022, 2:43 p.m. UTC
This patch-set provides fixes for the qcom-cpufreq-hw driver regarding
LMH irqs configurations and (un)plugging CPUs.
commit ffd6cc92ab9c ("arm64: dts: qcom: sm8250: add description of dcvsh interrupts")
enables DCVS (Dynamic Clock and Voltage Scaling) for sm8250 chips
(so rb5 included). As no LMH (Limits Management Hardware) interrupts
were seen, the firmware used for testing should not be able support
them.

The patch-set was tested on a rb5 with an old firmware version:
UEFI Ver    : 5.0.210817.BOOT.XF.3.2-00354-SM8250-1
Build Info  : 64b Aug 17 2021 23:35:39

This patch-set should still contain relevant modifications regarding
LMH interrupts and CPU hotplug. Still, it would be good to test
it on a platform which actually uses LMH interrupts.

LMH irqs can be identified with:
  cat /proc/interrupts | grep "dcvsh\-irq"
and their configuration can be seen at:
  /proc/irqs/XXX/*

Pierre Gondois (4):
  cpufreq: qcom-hw: Reset cancel_throttle when policy is re-enabled
  cpufreq: qcom-hw: Disable LMH irq when disabling policy
  cpufreq: qcom-hw: Remove deprecated irq_set_affinity_hint() call
  cpufreq: Change order of online() CB and policy->cpus modification

 drivers/cpufreq/cpufreq.c         |  6 +++---
 drivers/cpufreq/qcom-cpufreq-hw.c | 16 ++++++++++++----
 2 files changed, 15 insertions(+), 7 deletions(-)

Comments

Pierre Gondois July 4, 2022, 9:55 a.m. UTC | #1
Hello,
I saw that:
https://lore.kernel.org/all/20220617064421.l4vshytmqtittzee@vireshk-i7/

was applied, so this patch-set would need to be rebased. Please let me
know if you think it requires modifications before it gets rebased,

Regards,
Pierre

On 6/15/22 16:43, Pierre Gondois wrote:
> This patch-set provides fixes for the qcom-cpufreq-hw driver regarding
> LMH irqs configurations and (un)plugging CPUs.
> commit ffd6cc92ab9c ("arm64: dts: qcom: sm8250: add description of dcvsh interrupts")
> enables DCVS (Dynamic Clock and Voltage Scaling) for sm8250 chips
> (so rb5 included). As no LMH (Limits Management Hardware) interrupts
> were seen, the firmware used for testing should not be able support
> them.
> 
> The patch-set was tested on a rb5 with an old firmware version:
> UEFI Ver    : 5.0.210817.BOOT.XF.3.2-00354-SM8250-1
> Build Info  : 64b Aug 17 2021 23:35:39
> 
> This patch-set should still contain relevant modifications regarding
> LMH interrupts and CPU hotplug. Still, it would be good to test
> it on a platform which actually uses LMH interrupts.
> 
> LMH irqs can be identified with:
>    cat /proc/interrupts | grep "dcvsh\-irq"
> and their configuration can be seen at:
>    /proc/irqs/XXX/*
> 
> Pierre Gondois (4):
>    cpufreq: qcom-hw: Reset cancel_throttle when policy is re-enabled
>    cpufreq: qcom-hw: Disable LMH irq when disabling policy
>    cpufreq: qcom-hw: Remove deprecated irq_set_affinity_hint() call
>    cpufreq: Change order of online() CB and policy->cpus modification
> 
>   drivers/cpufreq/cpufreq.c         |  6 +++---
>   drivers/cpufreq/qcom-cpufreq-hw.c | 16 ++++++++++++----
>   2 files changed, 15 insertions(+), 7 deletions(-)
>
Viresh Kumar July 4, 2022, 9:58 a.m. UTC | #2
On 04-07-22, 11:55, Pierre Gondois wrote:
> Hello,
> I saw that:
> https://lore.kernel.org/all/20220617064421.l4vshytmqtittzee@vireshk-i7/
> 
> was applied, so this patch-set would need to be rebased. Please let me
> know if you think it requires modifications before it gets rebased,

Everything else looks fine, just rebase and resend. Thanks.