| Message ID | 20240915080733.3565-1-towinchenmi@gmail.com (mailing list archive) |
|---|---|
| Headers | show
Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com
[209.85.214.176])
(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))
(No client certificate requested)
by smtp.subspace.kernel.org (Postfix) with ESMTPS id 975799463;
Sun, 15 Sep 2024 08:08:03 +0000 (UTC)
Authentication-Results: smtp.subspace.kernel.org;
arc=none smtp.client-ip=209.85.214.176
ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
t=1726387686; cv=none;
b=kr44NAEUdvULaOax56pyqcr2Z9QCMSXtq1h9iOfaehq2sxKZSEFtSfj7lHoHtaOkVw/cbjmwukah7p4YBSa3g2A27oboOELEeAYJqMB9saEalvStfukj7J6z1gwBQKA+utLomvkHHAApi5006KBB+0eBvbMm1R2RAQrYChMdSpY=
ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
s=arc-20240116; t=1726387686; c=relaxed/simple;
bh=HBbzomDCHS9VMNDgivCbcZxwEjmyfDYTrM+4vswmgJ0=;
h=From:To:Cc:Subject:Date:Message-ID:MIME-Version;
b=f0Y2RVEPy3e2SrH0tUeg4ZdbjNVN72l84+p+r/c/YaXrEM5CvAk7ImW6TDpdT1kDjeP3GKfHKONzbVX2ym3uB4m4DGgfmIN78xejNSq4zJywTBA70Noug72cSEKCL3b6L5Y5c9zkX0gi9nWUXl72fT3J2Qiss61xEgv9SzpXDps=
ARC-Authentication-Results: i=1; smtp.subspace.kernel.org;
dmarc=pass (p=none dis=none) header.from=gmail.com;
spf=pass smtp.mailfrom=gmail.com;
dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com
header.b=fHaW0tCL; arc=none smtp.client-ip=209.85.214.176
Authentication-Results: smtp.subspace.kernel.org;
dmarc=pass (p=none dis=none) header.from=gmail.com
Authentication-Results: smtp.subspace.kernel.org;
spf=pass smtp.mailfrom=gmail.com
Authentication-Results: smtp.subspace.kernel.org;
dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com
header.b="fHaW0tCL"
Received: by mail-pl1-f176.google.com with SMTP id
d9443c01a7336-2053a0bd0a6so34696865ad.3;
Sun, 15 Sep 2024 01:08:03 -0700 (PDT)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=gmail.com; s=20230601; t=1726387683; x=1726992483;
darn=vger.kernel.org;
h=content-transfer-encoding:mime-version:message-id:date:subject:cc
:to:from:from:to:cc:subject:date:message-id:reply-to;
bh=nfFNCLFbfUj+WW4p0AkzDsMnwqpR69vaJ6dkbOYg4co=;
b=fHaW0tCLyJxA4ptDA4kf20u4BH5ypzWkM38+Ci7b9F1aYSgNE+/I0OUDTZcwyxs2o2
vHq291pLF6FTDpThDygaK0JYJRXSGjdXE/JKFIRXc5zsqXNvui+TQhD5Gh2B+T/vcRiu
o6OgqbWErtI/mb31FIpOcXin6+t35oZbwjEvInp7coDTMsVQRGn0vr4Qwhkf1Xu0uq58
vKt/BwjhJV4RiFiiMfnIYaxj1mI4JcN3dmCwui/88R+ZV3jgRufgifSX0jMgjwx8VIrd
lf+XAVl/Xa/PbKZkumUHGJ0aiNwK3pSTErn2kzfjkhCNznqkW8pn4b9xlk+SMSWQQouH
kZvg==
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20230601; t=1726387683; x=1726992483;
h=content-transfer-encoding:mime-version:message-id:date:subject:cc
:to:from:x-gm-message-state:from:to:cc:subject:date:message-id
:reply-to;
bh=nfFNCLFbfUj+WW4p0AkzDsMnwqpR69vaJ6dkbOYg4co=;
b=WJX7sgvI8zuE6xoNxj63pZbj2UqMItG/1pgL/OzHC1m4tt/ZxH8FscjMBB5V/z4uG2
UrjDcFYleW9O8MvcNgkn4Tq2ZskDv1Q6msFhQPitJcsM+4gI6ohNaOBTXf0R7ZY7J5Tv
mXnjEFSccwTBhi2y9nmWN6Rwt89GSC3Bt7kr+awISeq2+VQQWawZFKd6X2Yw7dA3OVqW
Mu1gp88oHC4dlzlUdeNCuenUTvQIlApgg3fPTwoaj2Gs1VHuWzlUbsCO+35iOjkECXu7
OiY0lB6fr1yS/IDsrrArn4WxEjpJRS1rq065CCUwFzKakyMmiwZS2g8u10BBsfYsEelq
vqXw==
X-Forwarded-Encrypted: i=1;
AJvYcCU2yfPSsEeqyfvtbZHbeO6Y0jPbT1sztAmgS2CFZhebVj1hQxgdDUvwnu/LnuWNi0f3TIAxo6E2Um0MNg==@vger.kernel.org,
AJvYcCUHn1D1f2Ed22yZ2BMx1kD4GIAeYKMUtvmWZPM4ybft1+b+i41QWPitj0expNc16zBmKs+a1TOGx2tFk/2N@vger.kernel.org,
AJvYcCUX+xxHUAPZU3LBLmX9vLZIrHxjPZjeY8w+5t2B+9fdupZs8cFwNzUx5+YKQtkFDyuEUMRP1Q+JYAI=@vger.kernel.org,
AJvYcCXn++aQI8hBK6Cx9Yidwvlvd57n4ovo+FfMQDF7cHwy7yAASqn8Ug2k1RHWykzzsobs4gXXPTJpodJm@vger.kernel.org,
AJvYcCXuBxOcSjXm8zX3xmGxl0VJ80mJmkt1c/qUMI/muxVLTzNFb7Gu7KocIhAgNYFVNz8cjB2RkwavDQ6mYNhVnoE=@vger.kernel.org
X-Gm-Message-State: AOJu0YyoOYGaQAY6nzvMmDuDbYVuNOvJOf6Xvi5yNt3UrcgrKbDRUme+
OvEn6SunLP/53S/bxFWrVqlyWhbPzlG/PQC1mAzwYyswk05IVRX5
X-Google-Smtp-Source:
AGHT+IECf+MZNUmNM3TwNwvyu6yF2ZVL6TDT9+xpInpdkglrJAoLX7asIved7uCS/IOdDOpRr7mX7g==
X-Received: by 2002:a17:902:da90:b0:205:9201:b520 with SMTP id
d9443c01a7336-2076e44e005mr187098935ad.58.1726387682632;
Sun, 15 Sep 2024 01:08:02 -0700 (PDT)
Received: from localhost.localdomain ([59.188.211.160])
by smtp.googlemail.com with ESMTPSA id
d9443c01a7336-207945db012sm18248865ad.19.2024.09.15.01.07.57
(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
Sun, 15 Sep 2024 01:08:01 -0700 (PDT)
From: Nick Chan <towinchenmi@gmail.com>
To: Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Mark Kettenis <kettenis@openbsd.org>,
asahi@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org,
linux-gpio@vger.kernel.org,
linux-watchdog@vger.kernel.org
Cc: Nick Chan <towinchenmi@gmail.com>,
Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>,
Konrad Dybcio <konradybcio@kernel.org>
Subject: [PATCH v3 00/20] Initial device trees for A7-A11 based Apple devices
Date: Sun, 15 Sep 2024 15:58:45 +0800
Message-ID: <20240915080733.3565-1-towinchenmi@gmail.com>
X-Mailer: git-send-email 2.46.0
Precedence: bulk
X-Mailing-List: linux-pm@vger.kernel.org
List-Id: <linux-pm.vger.kernel.org>
List-Subscribe: <mailto:linux-pm+subscribe@vger.kernel.org>
List-Unsubscribe: <mailto:linux-pm+unsubscribe@vger.kernel.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
|
| Series |
Initial device trees for A7-A11 based Apple devices
|
expand
|
Hi, This series adds device trees for all A7-A11 SoC based iPhones, iPads, iPod touches and Apple TVs. The following devices has been excluded from this series: - All T2 devices (A10-based): bootloader does not work (yet) - HomePod: Not tested, and it's also a different form factor To pass `make dtbs_check`, please install the latest dtschema from the main branch, for the `television` chassis type. This series supports the following on all devices: - SMP (spin-table) - UART - simple-framebuffer - watchdog - timer - pinctrl - AIC interrupts The following is supported on A7-A10: - Buttons and switches (with pinctrl) The buttons on A11 based devices like the iPhone X is a subdevice of the not yet supported SMC. Patch dependencies: - The required AIC patches[1] has been sitting in linux-next since next-20240906, through the tip tree. - The important serial fixes[2] has been sitting in linux-next since next-20240913, through the tty tree. - The optional patch to disable 32-bit EL0 on A10(X)[3] has not received any comments (v1 or v2). - A trivial patch to increase the reset delay in the watchdog driver[4] are needed on some SoCs to avoid the "Reboot Failed" message. It has been reviewed. (The system will reset regardless of the patch) Authorship information: - The commits to actually add the dts files are mostly made by Konrad, and Konrad's sign-off is added by me with permission. I also updated the Konrad's email in the actual dts files. Konrad can confirm this. - Everything else is entirely made by me. Changes since v2: - Removed A10 cpufreq. The loader may be missing some initialization code that just happened to be performed by some versions of the firmware as well, given the inconsistent behavior on different devices. It is also possible that the driver needs to be modified, I do not know and this needs more research first. - Removed Ivaylo's tags on commit to add A8X device trees, seems he does not want those anymore[5]. - Added Ivaylo's tags on commit to add A8 device tree, I have missed the tag. See [6] for source of those tags. - Added Conor's missing A-b on the commit to add A7 machine bindings. Changes since v1: - Added /chassis-type property - Added opp-microvolt in A10 cpufreq for documentation purposes - Home button is now assigned KEY_HOMEPAGE - Fixed t8010-n112.dts and do not remove it from Makefile in later commits... (iPod touch 7) In order to be consistent with the Apple ARM Machines bindings, the order of dt-bindings did not change from v1. The sort order logic here is having SoC type families in release order, and SoCs within each family in release order: - t8xxx/t700x/s5l8960x (Apple HxxP/G series, "phone"/"tablet" chips) - s5l8960x (Apple H6/A7) - t7000 (Apple H7P/A8) - t7001 (Apple H7G/A8X) - s8000/3 (Apple H8P/A9) - s8001 (Apple H8G/A9X) - t8010 (Apple H9P/A10) - t8011 (Apple H9G/A10X) - t8015 (Apple H10/A11) - t8103 (Apple H13G/M1) - t8112 (Apple H14G/M2) - t6xxx (Apple HxxJ series, "desktop" chips) - t6000 (Apple H13J(S)/M1 Pro) - t6001 (Apple H13J(C)/M1 Max) - t6002 (Apple H13J(D)/M1 Ultra) At this moment, it is expected that most hardware blocks will be 100% compatible between A-series and AX-series SoCs, though to a less extent than compatibility between desktop chips of the same generation. v1: https://lore.kernel.org/asahi/20240911084353.28888-2-towinchenmi@gmail.com v2: https://lore.kernel.org/asahi/20240914052413.68177-1-towinchenmi@gmail.com [1]: https://lore.kernel.org/asahi/20240901034143.12731-1-towinchenmi@gmail.com [2]: https://lore.kernel.org/asahi/20240911050741.14477-1-towinchenmi@gmail.com [3]: https://lore.kernel.org/asahi/20240909091425.16258-1-towinchenmi@gmail.com [4]: https://lore.kernel.org/asahi/20240913174540.45551-1-towinchenmi@gmail.com [5]: https://lore.kernel.org/asahi/34c748fe-89d2-d3a5-599d-52972c10f688@gmail.com [6]: https://github.com/konradybcio/linux-apple/commits/apple/v5.19-rc1 Nick Chan --- Konrad Dybcio (8): arm64: dts: apple: Add A7 devices arm64: dts: apple: Add A8 devices arm64: dts: apple: Add A8X devices arm64: dts: apple: Add A9 devices arm64: dts: apple: Add A9X devices arm64: dts: apple: Add A10 devices arm64: dts: apple: Add A10X devices arm64: dts: apple: Add A11 devices Nick Chan (12): dt-bindings: arm: cpus: Add Apple A7-A11 CPU cores dt-bindings: watchdog: apple,wdt: Add A7-A11 compatibles dt-bindings: pinctrl: apple,pinctrl: Add A7-A11 compatibles dt-bindings: arm: apple: Add A7 devices dt-bindings: arm: apple: Add A8 devices dt-bindings: arm: apple: Add A8X devices dt-bindings: arm: apple: Add A9 devices dt-bindings: arm: apple: Add A9X devices dt-bindings: arm: apple: Add A10 devices dt-bindings: arm: apple: Add A10X devices dt-bindings: arm: apple: Add A11 devices arm64: Kconfig: Update help text for CONFIG_ARCH_APPLE .../devicetree/bindings/arm/apple.yaml | 160 ++++++++++- .../devicetree/bindings/arm/cpus.yaml | 6 + .../bindings/pinctrl/apple,pinctrl.yaml | 5 + .../bindings/watchdog/apple,wdt.yaml | 5 + arch/arm64/Kconfig.platforms | 4 +- arch/arm64/boot/dts/apple/Makefile | 53 ++++ arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-j71.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j72.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j73.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j85.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j85m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j86.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j86m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j87.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j87m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi | 13 + arch/arm64/boot/dts/apple/s5l8960x-n51.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-n53.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x.dtsi | 146 ++++++++++ arch/arm64/boot/dts/apple/s8000-j71s.dts | 15 + arch/arm64/boot/dts/apple/s8000-j72s.dts | 15 + arch/arm64/boot/dts/apple/s8000-n66.dts | 15 + arch/arm64/boot/dts/apple/s8000-n69u.dts | 15 + arch/arm64/boot/dts/apple/s8000-n71.dts | 15 + arch/arm64/boot/dts/apple/s8000.dtsi | 178 ++++++++++++ arch/arm64/boot/dts/apple/s8001-j127.dts | 14 + arch/arm64/boot/dts/apple/s8001-j128.dts | 14 + arch/arm64/boot/dts/apple/s8001-j98a.dts | 14 + arch/arm64/boot/dts/apple/s8001-j99a.dts | 14 + arch/arm64/boot/dts/apple/s8001-pro.dtsi | 47 +++ arch/arm64/boot/dts/apple/s8001.dtsi | 167 +++++++++++ arch/arm64/boot/dts/apple/s8003-j71t.dts | 15 + arch/arm64/boot/dts/apple/s8003-j72t.dts | 15 + arch/arm64/boot/dts/apple/s8003-n66m.dts | 15 + arch/arm64/boot/dts/apple/s8003-n69.dts | 15 + arch/arm64/boot/dts/apple/s8003-n71m.dts | 15 + arch/arm64/boot/dts/apple/s8003.dtsi | 19 ++ arch/arm64/boot/dts/apple/s800x-6s.dtsi | 52 ++++ arch/arm64/boot/dts/apple/s800x-ipad5.dtsi | 46 +++ arch/arm64/boot/dts/apple/s800x-se.dtsi | 52 ++++ arch/arm64/boot/dts/apple/t7000-6.dtsi | 52 ++++ arch/arm64/boot/dts/apple/t7000-j42d.dts | 19 ++ arch/arm64/boot/dts/apple/t7000-j96.dts | 14 + arch/arm64/boot/dts/apple/t7000-j97.dts | 14 + arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 53 ++++ arch/arm64/boot/dts/apple/t7000-n102.dts | 50 ++++ arch/arm64/boot/dts/apple/t7000-n56.dts | 14 + arch/arm64/boot/dts/apple/t7000-n61.dts | 14 + arch/arm64/boot/dts/apple/t7000.dtsi | 146 ++++++++++ arch/arm64/boot/dts/apple/t7001-air2.dtsi | 46 +++ arch/arm64/boot/dts/apple/t7001-j81.dts | 14 + arch/arm64/boot/dts/apple/t7001-j82.dts | 14 + arch/arm64/boot/dts/apple/t7001.dtsi | 154 ++++++++++ arch/arm64/boot/dts/apple/t8010-7.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8010-d10.dts | 14 + arch/arm64/boot/dts/apple/t8010-d101.dts | 14 + arch/arm64/boot/dts/apple/t8010-d11.dts | 14 + arch/arm64/boot/dts/apple/t8010-d111.dts | 14 + arch/arm64/boot/dts/apple/t8010-ipad6.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8010-ipad7.dtsi | 15 + arch/arm64/boot/dts/apple/t8010-j171.dts | 14 + arch/arm64/boot/dts/apple/t8010-j172.dts | 14 + arch/arm64/boot/dts/apple/t8010-j71b.dts | 14 + arch/arm64/boot/dts/apple/t8010-j72b.dts | 14 + arch/arm64/boot/dts/apple/t8010-n112.dts | 50 ++++ arch/arm64/boot/dts/apple/t8010.dtsi | 167 +++++++++++ arch/arm64/boot/dts/apple/t8011-j105a.dts | 15 + arch/arm64/boot/dts/apple/t8011-j120.dts | 14 + arch/arm64/boot/dts/apple/t8011-j121.dts | 14 + arch/arm64/boot/dts/apple/t8011-j207.dts | 14 + arch/arm64/boot/dts/apple/t8011-j208.dts | 14 + arch/arm64/boot/dts/apple/t8011-pro2.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8011.dtsi | 175 ++++++++++++ arch/arm64/boot/dts/apple/t8015-8.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015-8plus.dtsi | 9 + arch/arm64/boot/dts/apple/t8015-d20.dts | 14 + arch/arm64/boot/dts/apple/t8015-d201.dts | 14 + arch/arm64/boot/dts/apple/t8015-d21.dts | 14 + arch/arm64/boot/dts/apple/t8015-d211.dts | 14 + arch/arm64/boot/dts/apple/t8015-d22.dts | 14 + arch/arm64/boot/dts/apple/t8015-d221.dts | 14 + arch/arm64/boot/dts/apple/t8015-x.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015.dtsi | 268 ++++++++++++++++++ 86 files changed, 3200 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j71.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j72.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j73.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n51.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n53.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8000-j71s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-j72s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n66.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n69u.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n71.dts create mode 100644 arch/arm64/boot/dts/apple/s8000.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001-j127.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j128.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j98a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j99a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-pro.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8003-j71t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-j72t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n66m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n69.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n71m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-6s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-ipad5.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-se.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-j42d.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j96.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j97.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-mini4.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-n102.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n56.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n61.dts create mode 100644 arch/arm64/boot/dts/apple/t7000.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-air2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-j81.dts create mode 100644 arch/arm64/boot/dts/apple/t7001-j82.dts create mode 100644 arch/arm64/boot/dts/apple/t7001.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-d10.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d101.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d11.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d111.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-j171.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j172.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j71b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j72b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-n112.dts create mode 100644 arch/arm64/boot/dts/apple/t8010.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011-j105a.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j120.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j121.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j207.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j208.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-pro2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-8.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-8plus.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-d20.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d201.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d21.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d211.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d22.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d221.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-x.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015.dtsi base-commit: 5acd9952f95fb4b7da6d09a3be39195a80845eb6