| Message ID | cover.1663025154.git.pawan.kumar.gupta@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Check enumeration before MSR save/restore | expand |
On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote: > Hi, > > This patchset is to fix the "unchecked MSR access error" [1] during S3 > resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL. > > Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG. > > Patch 3/3 adds check for feature bit before adding any speculation > control MSR to the list of MSRs to save/restore. > > [1] https://lore.kernel.org/lkml/20220906201743.436091-1-hdegoede@redhat.com/ Added the correct email-id of Hans de Goede <hdegoede@redhat.com>.
Hi, On 9/13/22 02:50, Pawan Gupta wrote: > On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote: >> Hi, >> >> This patchset is to fix the "unchecked MSR access error" [1] during S3 >> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL. >> >> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG. >> >> Patch 3/3 adds check for feature bit before adding any speculation >> control MSR to the list of MSRs to save/restore. >> >> [1] https://lore.kernel.org/lkml/20220906201743.436091-1-hdegoede@redhat.com/ > > Added the correct email-id of Hans de Goede <hdegoede@redhat.com>. I have tested this series and I can confirm that it fixes the exception which I was seeing on a Packard Bell Dot SC with an Atom N2600 CPU: Tested-by: Hans de Goede <hdegoede@redhat.com> Regards, Hans
On Sat, Sep 17, 2022 at 01:42:13PM +0200, Hans de Goede wrote: > Hi, > > On 9/13/22 02:50, Pawan Gupta wrote: > > On Mon, Sep 12, 2022 at 04:38:44PM -0700, Pawan Gupta wrote: > >> Hi, > >> > >> This patchset is to fix the "unchecked MSR access error" [1] during S3 > >> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL. > >> > >> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG. > >> > >> Patch 3/3 adds check for feature bit before adding any speculation > >> control MSR to the list of MSRs to save/restore. > >> > >> [1] https://lore.kernel.org/lkml/20220906201743.436091-1-hdegoede@redhat.com/ > > > > Added the correct email-id of Hans de Goede <hdegoede@redhat.com>. > > I have tested this series and I can confirm that it fixes the exception > which I was seeing on a Packard Bell Dot SC with an Atom N2600 CPU: > > Tested-by: Hans de Goede <hdegoede@redhat.com> Thanks.
Hi All, On 9/13/22 01:38, Pawan Gupta wrote: > Hi, > > This patchset is to fix the "unchecked MSR access error" [1] during S3 > resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL. > > Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG. > > Patch 3/3 adds check for feature bit before adding any speculation > control MSR to the list of MSRs to save/restore. > > [1] https://lore.kernel.org/lkml/20220906201743.436091-1-hdegoede@redhat.com/ > > Pawan Gupta (3): > x86/tsx: Add feature bit for TSX control MSR support > x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration > x86/pm: Add enumeration check before spec MSRs save/restore setup What is the status of this series ? To me this seems like a sensible way to solve the problem which I reported and other similar problems... Regards, Hans
On Tue, Nov 08, 2022 at 07:16:00PM +0100, Hans de Goede wrote:
> What is the status of this series ?
Lost in the avalanche of patches. ;-\
Will take a look tomorrow.
On Tue, Nov 08, 2022 at 07:26:43PM +0100, Borislav Petkov wrote:
> Will take a look tomorrow.
Yap, needs a new revision.
On Tue, Nov 08, 2022 at 07:55:04PM +0100, Borislav Petkov wrote: >On Tue, Nov 08, 2022 at 07:26:43PM +0100, Borislav Petkov wrote: >> Will take a look tomorrow. > >Yap, needs a new revision. Sure, I will revise this.