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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN3PEPF0000B073.mail.protection.outlook.com (10.167.243.118) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7544.18 via Frontend Transport; Mon, 6 May 2024 10:20:15 +0000 Received: from pyuan-Chachani-VN.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 6 May 2024 05:20:11 -0500 From: Perry Yuan To: , , , , , CC: , , , , , , Subject: [PATCH v9 0/7] AMD Pstate Driver Core Performance Boost Date: Mon, 6 May 2024 18:19:52 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B073:EE_|PH7PR12MB8054:EE_ X-MS-Office365-Filtering-Correlation-Id: c148d41f-0d60-4822-037f-08dc6db61f06 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|82310400017|36860700004|1800799015; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2024 10:20:15.1418 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c148d41f-0d60-4822-037f-08dc6db61f06 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B073.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8054 Hi all, The patchset series add core performance boost feature for AMD pstate driver including passisve ,guide and active mode support. User can change core frequency boost control with a new sysfs entry: "/sys/devices/system/cpu/amd_pstate/cpb_boost" 1) disable core boost: $ sudo bash -c "echo 0 > /sys/devices/system/cpu/amd_pstate/cpb_boost" $ lscpu -ae CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ 0 0 0 0 0:0:0:0 yes 4201.0000 400.0000 2983.578 1 0 0 1 1:1:1:0 yes 4201.0000 400.0000 2983.578 2 0 0 2 2:2:2:0 yes 4201.0000 400.0000 2583.855 3 0 0 3 3:3:3:0 yes 4201.0000 400.0000 2983.578 4 0 0 4 4:4:4:0 yes 4201.0000 400.0000 2983.578 2) enable core boost: $ sudo bash -c "echo 1 > /sys/devices/system/cpu/amd_pstate/cpb_boost" $ lscpu -ae 0 0 0 0 0:0:0:0 yes 5759.0000 400.0000 2983.578 1 0 0 1 1:1:1:0 yes 5759.0000 400.0000 2983.578 2 0 0 2 2:2:2:0 yes 5759.0000 400.0000 2983.578 3 0 0 3 3:3:3:0 yes 5759.0000 400.0000 2983.578 4 0 0 4 4:4:4:0 yes 5759.0000 400.0000 2983.578 ============================================================================ The V9 patches add per CPU boost control, user can enable/disable CPUs boost as the below command tested on a laptop system. # before CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ 0 0 0 0 0:0:0:0 yes 4208.0000 400.0000 1666.7740 1 0 0 0 0:0:0:0 yes 4208.0000 400.0000 400.0000 2 0 0 1 1:1:1:0 yes 4208.0000 400.0000 3386.1260 3 0 0 1 1:1:1:0 yes 4208.0000 400.0000 400.0000 $ sudo rdmsr 0xc00102b3 -p 0 10a6 $ sudo bash -c "echo 1 > /sys/devices/system/cpu/cpu0/cpufreq/amd_pstate_boost_cpb" # after CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ 0 0 0 0 0:0:0:0 yes 3501.0000 400.0000 400.0000 1 0 0 0 0:0:0:0 yes 4208.0000 400.0000 1391.0690 2 0 0 1 1:1:1:0 yes 4208.0000 400.0000 3654.4541 3 0 0 1 1:1:1:0 yes 4208.0000 400.0000 400.0000 $ sudo rdmsr 0xc00102b3 -p 0 108a The patches have been tested with the AMD 7950X processor and many users would like to get core boost control enabled for power saving. Perry. Changes from v8: * pick RB flag for patch 4 (Mario) * change boot_cpu_has to cpu_feature_enabled for patch 2 (Boris) * merge patch 6 into patch 3 (Mario) * add two patch for per CPU boost control patch 6 & 7(Mario) * rebased to latest linux-pm/bleeding-edge Changes from v7: * fix the mutext locking issue in the sysfs file update(Ray, Mario) * pick ack flag from Ray * use X86_FEATURE_CPB to verify the CPB function in Patch #2(Ray) * rerun the testing to check function works well * rebased to linux-pm/bleeding-edge latest Changes from v6: * reword patch 2 commit log (Gautham) * update cover letter description(Gautham) * rebase to kernel v6.9-rc5 Changes from v4: * drop the legacy boost remove patch, let us keep the legacy interface in case some applications break. * rebase to linux-pm/bleeding-edge branch * rework the patchset base on [PATCH v8 0/8] AMD Pstate Fixes And Enhancements which has some intial work done there. Changes from v4: * move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h * pick RB flag from Gautham R. Shenoy * add Cc Oleksandr Natalenko * rebase to latest linux-pm/bleeding-edge branch * rebase the patch set on top of [PATCH v7 0/6] AMD Pstate Fixes And Enhancements * update [PATCH v7 2/6] to use MSR_K7_HWCR_CPB_DIS_BIT Changes from v3: * rebased to linux-pm/bleeding-edge v6.8 * rename global to amd_pstate_global_params(Oleksandr Natalenko) * remove comments for boot_supported in amd_pstate.h * fix the compiler warning for amd-pstate-ut.ko * use for_each_online_cpu in cpb_boost_store which fix the null pointer error during testing * fix the max frequency value to be KHz when cpb boost disabled(Gautham R. Shenoy) Changes from v2: * move global struct to amd-pstate.h * fix the amd-pstate-ut with new cpb control interface Changes from v1: * drop suspend/resume fix patch 6/7 because of the fix should be in another fix series instead of CPB feature * move the set_boost remove patch to the last(Mario) * Fix commit info with "Closes:" (Mario) * simplified global.cpb_supported initialization(Mario) * Add guide mode support for CPB control * Fixed some Doc typos and add guide mode info to Doc as well. v1: https://lore.kernel.org/all/cover.1706255676.git.perry.yuan@amd.com/ v2: https://lore.kernel.org/lkml/cover.1707047943.git.perry.yuan@amd.com/ v3: https://lore.kernel.org/lkml/cover.1707297581.git.perry.yuan@amd.com/ v4: https://lore.kernel.org/lkml/cover.1710322310.git.perry.yuan@amd.com/ v5: https://lore.kernel.org/lkml/cover.1710473712.git.perry.yuan@amd.com/ v6: https://lore.kernel.org/lkml/cover.1710754236.git.perry.yuan@amd.com/ v7: https://lore.kernel.org/lkml/cover.1713861200.git.perry.yuan@amd.com/ v8: https://lore.kernel.org/lkml/cover.1714112854.git.perry.yuan@amd.com/ Perry Yuan (7): cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h cpufreq: amd-pstate: initialize new core precision boost state cpufreq: amd-pstate: implement cpb_boost sysfs entry for boost control cpufreq: amd-pstate: fix the MSR highest perf will be reset issue while cpb boost off Documentation: cpufreq: amd-pstate: introduce the new cpu boost control method cpufreq: amd-pstate: introduce per CPU frequency boost control Documentation: cpufreq: amd-pstate: update doc for Per CPU boost control method Documentation/admin-guide/pm/amd-pstate.rst | 31 ++++ arch/x86/include/asm/msr-index.h | 2 + drivers/cpufreq/acpi-cpufreq.c | 2 - drivers/cpufreq/amd-pstate-ut.c | 2 +- drivers/cpufreq/amd-pstate.c | 189 ++++++++++++++++++-- include/linux/amd-pstate.h | 14 ++ 6 files changed, 226 insertions(+), 14 deletions(-)