From patchwork Wed Mar 27 05:00:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 10872503 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3847186E for ; Wed, 27 Mar 2019 04:59:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF8C228758 for ; Wed, 27 Mar 2019 04:59:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A35792876C; Wed, 27 Mar 2019 04:59:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D49028769 for ; Wed, 27 Mar 2019 04:59:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725829AbfC0E7U (ORCPT ); Wed, 27 Mar 2019 00:59:20 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:40105 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725613AbfC0E7U (ORCPT ); Wed, 27 Mar 2019 00:59:20 -0400 Received: by mail-pg1-f196.google.com with SMTP id u9so9342378pgo.7; Tue, 26 Mar 2019 21:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gbLsQajapHp8yt8fkh0lWuCUAozPg7cvkSOmtAlT5GA=; b=HsXWqFbK4h2vjS6XbRFUkVqK7tZM6SdYfp0Z1hI0UP5TFv0G7nw4V/MGYYMPLzHMdx O6k2HEsdCsOH7n667eMxq2havDwD0uI+zY4sAJ/pagqecSOqmKy6HiTl4arijqQs06Dc zt5wteOtMGcJwO4wIm66boQPaD/6Um3Mv20wu+mi4w/qtj0tBRrWjcvjohoOW30lfauM PDiGQZXTLvmJD3gYP3yhKhni0JTSisUCUXD8xvE/DBOBy8BGqurnHvNNqPVNpdI+HTmA I7xwDxuLYlENM4mqGm8BxtzvA9sgaiYfVg5qUhYuExYLaPJR2j+7BN2NVrEpcRZmKGrM EK5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gbLsQajapHp8yt8fkh0lWuCUAozPg7cvkSOmtAlT5GA=; b=bueVbPYbNx71wyfwmv4L5lxMvsZGKE6y1RQGfJ50EuGHT8NpRLI3HgHXtNpQaSXFU8 OeL9ldGAex9fblZqp9tcH6gmSmN6invxKLFBehBMIXmiLBZXsyBCnsF8z17+jTwayGqQ pQ8ET2E/NTEBuiR8aOgt87ca1jRxDuSTxJEqkUBguI+QDyQ9leHuRDP2XZui8iq64cEW Xg95xIo4AMtl/T5PoiwQpIyzw7kIsRixGHV7vc4lI2/ypHbOSfjxykgOM6pYTyI6IAMd 5X/0+Ha/LG3xnCPgjBoRvtaJOaccNxlh0NGWvJq3TN9y4kGgqtv8GYa752IlvA0ATafu 3cWw== X-Gm-Message-State: APjAAAUsmEGb5y2BqOoNPk1ZEFk90OUKbIIgS+CpDJNu7g7x+8q9LR4p U6VoX1SgZKNfQa6y2zGP2EQ= X-Google-Smtp-Source: APXvYqw9pqGDQLDvev7hWSvpe+IZ4GA3cqzDzC2rsG73IuYK6jyFsZLC/yydvfpq4ECwqpBO6ip3RA== X-Received: by 2002:a65:4844:: with SMTP id i4mr31635821pgs.347.1553662759269; Tue, 26 Mar 2019 21:59:19 -0700 (PDT) Received: from localhost.localdomain ([2001:268:c0a5:6014:c70:4af9:86e2:2]) by smtp.gmail.com with ESMTPSA id y12sm26769011pgq.64.2019.03.26.21.59.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Mar 2019 21:59:18 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, William Breathitt Gray Subject: [PATCH v13 05/11] gpio: gpio-mm: Utilize for_each_set_clump8 macro Date: Wed, 27 Mar 2019 14:00:10 +0900 Message-Id: <09275d98903df1b8c43b7fb469f5bc1ea562285b.1553661964.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 73 +++++++++++-------------------------- 1 file changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 8c150fd68d9d..0cef50d14c5a 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,25 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(gpiommgpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + port_addr = gpiommgpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, port_state, offset); } return 0; @@ -242,37 +221,27 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; - unsigned int bitmask; + unsigned long offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; + unsigned long bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + index = offset / 8; + port_addr = gpiommgpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[index] &= ~gpio_mask; + gpiommgpio->out_state[index] |= bitmask; + outb(gpiommgpio->out_state[index], port_addr); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } }