From patchwork Tue Nov 13 19:32:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenghua Yu X-Patchwork-Id: 1737411 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 3FCC63FCAE for ; Wed, 14 Nov 2012 02:36:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932620Ab2KNCer (ORCPT ); Tue, 13 Nov 2012 21:34:47 -0500 Received: from mga14.intel.com ([143.182.124.37]:53055 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932436Ab2KNCdq (ORCPT ); Tue, 13 Nov 2012 21:33:46 -0500 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 13 Nov 2012 18:33:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.83,247,1352102400"; d="scan'208";a="217413955" Received: from fenghua-desk.sc.intel.com ([10.3.52.80]) by azsmga001.ch.intel.com with ESMTP; 13 Nov 2012 18:33:44 -0800 From: "Fenghua Yu" To: "Ingo Molnar" , "Thomas Gleixner" , "H Peter Anvin" , "Linus Torvalds" , "Andrew Morton" , "Asit K Mallick" , "Tony Luck" , "Arjan Dan De Ven" , "Suresh B Siddha" , "Len Brown" , "Srivatssa S. Bhat" , "Randy Dunlap" , "Rafael J. Wysocki" , "Chen Gong" , "linux-kernel" , "linux-pm" , "x86" Cc: "Fenghua Yu" Subject: [PATCH v10 10/14] x86, hotplug: During CPU0 online, enable x2apic, set_numa_node. Date: Tue, 13 Nov 2012 11:32:47 -0800 Message-Id: <1352835171-3958-11-git-send-email-fenghua.yu@intel.com> X-Mailer: git-send-email 1.7.2 In-Reply-To: <1352835171-3958-1-git-send-email-fenghua.yu@intel.com> References: <1352835171-3958-1-git-send-email-fenghua.yu@intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fenghua Yu Previously these functions were not run on the BSP (CPU 0, the boot processor) since the boot processor init would only be executed before this functionality was initialized. Signed-off-by: Fenghua Yu --- arch/x86/kernel/cpu/common.c | 5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 7505f7b..ca165ac 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1237,7 +1237,7 @@ void __cpuinit cpu_init(void) oist = &per_cpu(orig_ist, cpu); #ifdef CONFIG_NUMA - if (cpu != 0 && this_cpu_read(numa_node) == 0 && + if (this_cpu_read(numa_node) == 0 && early_cpu_to_node(cpu) != NUMA_NO_NODE) set_numa_node(early_cpu_to_node(cpu)); #endif @@ -1269,8 +1269,7 @@ void __cpuinit cpu_init(void) barrier(); x86_configure_nx(); - if (cpu != 0) - enable_x2apic(); + enable_x2apic(); /* * set up and load the per-CPU TSS