From patchwork Wed Nov 28 10:27:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 1815021 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 86577DF26F for ; Wed, 28 Nov 2012 10:28:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754067Ab2K1K2c (ORCPT ); Wed, 28 Nov 2012 05:28:32 -0500 Received: from eu1sys200aog111.obsmtp.com ([207.126.144.131]:38288 "EHLO eu1sys200aog111.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753572Ab2K1K2b (ORCPT ); Wed, 28 Nov 2012 05:28:31 -0500 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob111.postini.com ([207.126.147.11]) with SMTP ID DSNKULXnR9shY5ui3K1GajoNq0ld/OBueyoZ@postini.com; Wed, 28 Nov 2012 10:28:30 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D8252FC; Wed, 28 Nov 2012 10:28:00 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4EE332D4D; Wed, 28 Nov 2012 10:28:00 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 03CD7A809C; Wed, 28 Nov 2012 11:27:56 +0100 (CET) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 28 Nov 2012 11:27:59 +0100 From: Ulf Hansson To: "Rafael J. Wysocki" , , Cc: , Lee Jones , Linus Walleij , Rickard Andersson , Jonas Aberg , Vincent Guittot , Philippe Begnic , Ulf Hansson Subject: [PATCH 4/5] cpufreq: dbx500: Minor code cleanup Date: Wed, 28 Nov 2012 11:27:43 +0100 Message-ID: <1354098464-6665-5-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1354098464-6665-1-git-send-email-ulf.hansson@stericsson.com> References: <1354098464-6665-1-git-send-email-ulf.hansson@stericsson.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Jonas Aaberg Some minor code cleanup and some minor changes to printed error messages. Signed-off-by: Jonas Aaberg Signed-off-by: Ulf Hansson --- drivers/cpufreq/dbx500-cpufreq.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/dbx500-cpufreq.c b/drivers/cpufreq/dbx500-cpufreq.c index d974a8e..d4cb782 100644 --- a/drivers/cpufreq/dbx500-cpufreq.c +++ b/drivers/cpufreq/dbx500-cpufreq.c @@ -36,6 +36,7 @@ static int dbx500_cpufreq_target(struct cpufreq_policy *policy, { struct cpufreq_freqs freqs; unsigned int idx; + int ret; /* scale the target frequency to one of the extremes supported */ if (target_freq < policy->cpuinfo.min_freq) @@ -44,10 +45,9 @@ static int dbx500_cpufreq_target(struct cpufreq_policy *policy, target_freq = policy->cpuinfo.max_freq; /* Lookup the next frequency */ - if (cpufreq_frequency_table_target - (policy, freq_table, target_freq, relation, &idx)) { + if (cpufreq_frequency_table_target(policy, freq_table, target_freq, + relation, &idx)) return -EINVAL; - } freqs.old = policy->cur; freqs.new = freq_table[idx].frequency; @@ -60,9 +60,12 @@ static int dbx500_cpufreq_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* update armss clk frequency */ - if (clk_set_rate(armss_clk, freq_table[idx].frequency * 1000)) { - pr_err("dbx500-cpufreq: Failed to update armss clk\n"); - return -EINVAL; + ret = clk_set_rate(armss_clk, freqs.new * 1000); + + if (ret) { + pr_err("dbx500-cpufreq: Failed to set armss_clk to %d Hz: error %d\n", + freqs.new * 1000, ret); + return ret; } /* post change notification */ @@ -97,7 +100,7 @@ static int __cpuinit dbx500_cpufreq_init(struct cpufreq_policy *policy) if (!res) cpufreq_frequency_table_get_attr(freq_table, policy->cpu); else { - pr_err("dbx500-cpufreq : Failed to read policy table\n"); + pr_err("dbx500-cpufreq: Failed to read policy table\n"); return res; } @@ -143,11 +146,11 @@ static int dbx500_cpufreq_probe(struct platform_device *pdev) armss_clk = clk_get(&pdev->dev, "armss"); if (IS_ERR(armss_clk)) { - pr_err("dbx500-cpufreq : Failed to get armss clk\n"); + pr_err("dbx500-cpufreq: Failed to get armss clk\n"); return PTR_ERR(armss_clk); } - pr_info("dbx500-cpufreq : Available frequencies:\n"); + pr_info("dbx500-cpufreq: Available frequencies:\n"); while (freq_table[i].frequency != CPUFREQ_TABLE_END) { pr_info(" %d Mhz\n", freq_table[i].frequency/1000); i++; @@ -169,7 +172,6 @@ static int __init dbx500_cpufreq_register(void) if (!cpu_is_u8500_family()) return -ENODEV; - pr_info("cpufreq for DBX500 started\n"); return platform_driver_register(&dbx500_cpufreq_plat_driver); } device_initcall(dbx500_cpufreq_register);