@@ -23,6 +23,16 @@
cpus {
cpu@0 {
compatible = "arm,cortex-a8";
+ /* OMAP3430 variants OPP1-5 */
+ operating-points = <
+ /* kHz uV */
+ 125000 975000
+ 250000 1075000
+ 500000 1200000
+ 550000 1270000
+ 600000 1350000
+ >;
+ clock-latency = <300000>; /* From legacy driver */
};
};
@@ -87,17 +87,6 @@ struct omap_volt_data omap36xx_vddcore_volt_data[] = {
/* OPP data */
static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
- /* MPU OPP1 */
- OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
- /* MPU OPP2 */
- OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
- /* MPU OPP3 */
- OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
- /* MPU OPP4 */
- OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
- /* MPU OPP5 */
- OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
-
/*
* L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
* almost the same than the one at 83MHz thus providing very little
Add DT OPP table for OMAP34xx family of devices. This data is decoded by OF with of_init_opp_table() helper function. This is in preparation to use generic cpu0-cpufreq driver. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: "BenoƮt Cousson" <b-cousson@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Keerthy <j-keerthy@ti.com> Cc: linux-omap@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Cc: cpufreq@vger.kernel.org Cc: linux-pm@vger.kernel.org Signed-off-by: Nishanth Menon <nm@ti.com> --- arch/arm/boot/dts/omap3.dtsi | 10 ++++++++++ arch/arm/mach-omap2/opp3xxx_data.c | 11 ----------- 2 files changed, 10 insertions(+), 11 deletions(-)