From patchwork Mon Jun 17 06:46:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kachhap X-Patchwork-Id: 2731181 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2D5499F39E for ; Mon, 17 Jun 2013 06:51:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C8F7201FC for ; Mon, 17 Jun 2013 06:51:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CAFC201E8 for ; Mon, 17 Jun 2013 06:51:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932327Ab3FQGvP (ORCPT ); Mon, 17 Jun 2013 02:51:15 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:53144 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932132Ab3FQGsq (ORCPT ); Mon, 17 Jun 2013 02:48:46 -0400 Received: by mail-pd0-f170.google.com with SMTP id x11so2460842pdj.1 for ; Sun, 16 Jun 2013 23:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=GdJb6/N9paVg5xnEMNrQur59N3rrx5ydR/7x6MvR/Uw=; b=gT1vASqhEu4SNczN2eLbW0DDlMCFNqTU6UHTPcMJPEHqgbUs+VUA0D29aKrPBhDazb syItc9oeyB8b4OMbQXXOvN4PShbfgIEwJOa53pdTgtbDNysiwvsoBA3loY/EXO+f1BuF NX9jwMlncMaLGQRhxMoDgsAJjGDP3feHej3KCG0nQKWRNIncaKdw9NAzZptkny8ji74Z aE9yKCcFoAG5K3dvgARaYxMt5Sj8uvvMf9RuKEXpzFYK0GXPvR3pte+uxJHEoOcc9P5r ub1Oe4yEbgLQb45mlk9YqDooGbGJmmqqiOhyF7qoUuwpf6pVt1Klb80YXw7atMe66gRB f9LQ== X-Received: by 10.68.136.138 with SMTP id qa10mr1039935pbb.117.1371451725507; Sun, 16 Jun 2013 23:48:45 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id xl3sm11639859pbb.17.2013.06.16.23.48.40 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 16 Jun 2013 23:48:44 -0700 (PDT) From: Amit Daniel Kachhap To: linux-pm@vger.kernel.org, Zhang Rui , Eduardo Valentin Cc: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, amit.kachhap@gmail.com, Kukjin Kim , jonghwa3.lee@samsung.com Subject: [PATCH V6 22/30] thermal: exynos: Add support to access common register for multistance Date: Mon, 17 Jun 2013 12:16:31 +0530 Message-Id: <1371451599-31035-23-git-send-email-amit.daniel@samsung.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1371451599-31035-1-git-send-email-amit.daniel@samsung.com> References: <1371451599-31035-1-git-send-email-amit.daniel@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support to parse one more common set of TMU register. First set of register belongs to each instance of TMU and second set belongs to common TMU registers. Acked-by: Jonghwa Lee Acked-by: Kukjin Kim Signed-off-by: Amit Daniel Kachhap Acked-by: Eduardo Valentin --- .../devicetree/bindings/thermal/exynos-thermal.txt | 6 +++++- drivers/thermal/samsung/exynos_tmu.c | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index 535fd0e..0ea33f7 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -7,7 +7,11 @@ "samsung,exynos4210-tmu" "samsung,exynos5250-tmu" - interrupt-parent : The phandle for the interrupt controller -- reg : Address range of the thermal registers +- reg : Address range of the thermal registers. For soc's which has multiple + instances of TMU and some registers are shared across all TMU's like + interrupt related then 2 set of register has to supplied. First set + belongs to each instance of TMU and second set belongs to common TMU + registers. - interrupts : Should contain interrupt for thermal system - clocks : The main clock for TMU device - clock-names : Thermal system clock name diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 877dab8..150a869 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -40,6 +40,7 @@ * @id: identifier of the one instance of the TMU controller. * @pdata: pointer to the tmu platform/configuration data * @base: base address of the single instance of the TMU controller. + * @base_common: base address of the common registers of the TMU controller. * @irq: irq number of the TMU controller. * @soc: id of the SOC type. * @irq_work: pointer to the irq work structure. @@ -53,6 +54,7 @@ struct exynos_tmu_data { int id; struct exynos_tmu_platform_data *pdata; void __iomem *base; + void __iomem *base_common; int irq; enum soc_type soc; struct work_struct irq_work; @@ -478,6 +480,24 @@ static int exynos_map_dt_data(struct platform_device *pdev) return -ENODEV; } data->pdata = pdata; + /* + * Check if the TMU shares some registers and then try to map the + * memory of common registers. + */ + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) + return 0; + + if (of_address_to_resource(pdev->dev.of_node, 1, &res)) { + dev_err(&pdev->dev, "failed to get Resource 1\n"); + return -ENODEV; + } + + data->base_common = devm_ioremap(&pdev->dev, res.start, + resource_size(&res)); + if (!data->base) { + dev_err(&pdev->dev, "Failed to ioremap memory\n"); + return -ENOMEM; + } return 0; }