From patchwork Fri Aug 23 23:15:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Valentin X-Patchwork-Id: 2849152 X-Patchwork-Delegate: rui.zhang@intel.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E657CBF546 for ; Fri, 23 Aug 2013 23:21:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 027D9203FB for ; Fri, 23 Aug 2013 23:21:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E9E2203EA for ; Fri, 23 Aug 2013 23:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756485Ab3HWXUK (ORCPT ); Fri, 23 Aug 2013 19:20:10 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:48769 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756477Ab3HWXUF (ORCPT ); Fri, 23 Aug 2013 19:20:05 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r7NNIhuS030979; Fri, 23 Aug 2013 18:18:43 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r7NNIhdX009082; Fri, 23 Aug 2013 18:18:43 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 23 Aug 2013 18:18:43 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id r7NNIh0a021044; Fri, 23 Aug 2013 18:18:43 -0500 Received: from localhost (h68-1.vpn.ti.com [172.24.68.1]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r7NNIYt22856; Fri, 23 Aug 2013 18:18:34 -0500 (CDT) From: Eduardo Valentin To: , , , , , , , , CC: , , , , , Eduardo Valentin , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Russell King , , Subject: [RFC PATCH 13/14] arm: dts: add omap5 thermal data Date: Fri, 23 Aug 2013 19:15:54 -0400 Message-ID: <1377299755-5134-14-git-send-email-eduardo.valentin@ti.com> X-Mailer: git-send-email 1.8.2.1.342.gfa7285d In-Reply-To: <1377299755-5134-1-git-send-email-eduardo.valentin@ti.com> References: <1377299755-5134-1-git-send-email-eduardo.valentin@ti.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch changes the dtsi entry on omap5 to contain the thermal data. This data will enable the passive cooling with CPUfreq cooling device at 100C. The system will do a thermal shutdown at 125C whenever any of its sensors sees this level. Cc: "Benoît Cousson" Cc: Tony Lindgren Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Stephen Warren Cc: Ian Campbell Cc: Russell King Cc: linux-omap@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Eduardo Valentin --- arch/arm/boot/dts/omap5.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index e643620..4a33fe0 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -45,6 +45,12 @@ }; }; + thermal_zones { + #include "omap4-cpu-thermal.dtsi" + #include "omap5-gpu-thermal.dtsi" + #include "omap5-core-thermal.dtsi" + }; + timer { compatible = "arm,armv7-timer"; /* PPI secure/nonsecure IRQ */ @@ -711,6 +717,9 @@ 0x4a0023C0 0x3c>; interrupts = ; compatible = "ti,omap5430-bandgap"; + monitored-zones = <&cpu_thermal 0>, + <&gpu_thermal 1>, + <&core_thermal 2>; }; }; };