From patchwork Tue Nov 12 13:52:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas KANDAGATLA X-Patchwork-Id: 3172611 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EF1A99F68F for ; Tue, 12 Nov 2013 13:57:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C5F38204FB for ; Tue, 12 Nov 2013 13:57:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7D9F320489 for ; Tue, 12 Nov 2013 13:57:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753951Ab3KLNyK (ORCPT ); Tue, 12 Nov 2013 08:54:10 -0500 Received: from eu1sys200aog108.obsmtp.com ([207.126.144.125]:60499 "EHLO eu1sys200aog108.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752482Ab3KLNyH (ORCPT ); Tue, 12 Nov 2013 08:54:07 -0500 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob108.postini.com ([207.126.147.11]) with SMTP ID DSNKUoIy1hQBod2ravayqRUCO0ZSJtnHvjd1@postini.com; Tue, 12 Nov 2013 13:54:07 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 54B27EA; Tue, 12 Nov 2013 13:52:54 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 70AA8542D; Tue, 12 Nov 2013 13:40:02 +0000 (GMT) Received: from localhost (10.65.51.59) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.123.3; Tue, 12 Nov 2013 14:53:25 +0100 From: To: , Cc: Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , Rob Landley , Russell King , Srinivas Kandagatla , Stuart Menefy , Pavel Machek , "Rafael J. Wysocki" , Len Brown , , Greg Kroah-Hartman , Giuseppe Cavallaro , Grant Likely , , , , , Subject: [PATCH RFC 05/10] drivers: reset: stih416: add softreset controller Date: Tue, 12 Nov 2013 13:52:45 +0000 Message-ID: <1384264365-7523-1-git-send-email-srinivas.kandagatla@st.com> X-Mailer: git-send-email 1.7.6.5 In-Reply-To: <1384264311-7308-1-git-send-email-srinivas.kandagatla@st.com> References: <1384264311-7308-1-git-send-email-srinivas.kandagatla@st.com> MIME-Version: 1.0 X-Originating-IP: [10.65.51.59] Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinivas Kandagatla This patch adds softreset controller for STiH416 SOC, soft reset controller is based on system configuration registers which are mapped via regmap. This reset controller does not have any feedback or acknowledgement. With this patch a new device "st,stih416-softreset" is registered with system configuration registers based reset controller that controls the softreset state of the hardware such as Ethernet, IRB. Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/stih416.dtsi | 5 ++++ drivers/reset/sti/reset-stih416.c | 22 ++++++++++++++++++++ .../dt-bindings/reset-controller/stih416-resets.h | 4 +++ 3 files changed, 31 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index b8cabbb..a3831a3 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -32,6 +32,11 @@ compatible = "st,stih416-powerdown"; }; + softreset: softreset-controller { + #reset-cells = <1>; + compatible = "st,stih416-softreset"; + }; + syscfg_sbc:sbc-syscfg@fe600000{ compatible = "st,stih416-sbc-syscfg", "syscon"; reg = <0xfe600000 0x1000>; diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c index 0becfc5..685fd3b 100644 --- a/drivers/reset/sti/reset-stih416.c +++ b/drivers/reset/sti/reset-stih416.c @@ -37,6 +37,10 @@ static const char stih416_lpm[] = "st,stih416-lpm-syscfg"; #define SYSCFG_2525 0x834 /* Powerdown request USB/SATA/PCIe */ #define SYSSTAT_2583 0x91c /* Powerdown status USB/SATA/PCIe */ +#define SYSCFG_1539 0x86c /* Softreset Ethernet 0 */ +#define SYSCFG_510 0x7f8 /* Softreset Ethernet 1 */ +#define LPM_SYSCFG_1 0x4 /* Softreset IRB */ + static const struct syscfg_reset_channel_data stih416_powerdowns[] = { [STIH416_EMISS_POWERDOWN] = STIH416_PDN_FRONT(0), [STIH416_NAND_POWERDOWN] = STIH416_PDN_FRONT(1), @@ -51,15 +55,33 @@ static const struct syscfg_reset_channel_data stih416_powerdowns[] = { [STIH416_PCIE1_POWERDOWN] = STIH416_PDN_REAR(5, 8), }; +static const struct syscfg_reset_channel_data stih416_softresets[] = { + [STIH416_ETH0_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_front, + SYSCFG_1539, 0), + [STIH416_ETH1_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_sbc, + SYSCFG_510, 0), + [STIH416_IRB_SOFTRESET] = _SYSCFG_RST_CH_NO_ACK(stih416_lpm, + LPM_SYSCFG_1, 6), +}; + static struct syscfg_reset_controller_data stih416_powerdown_controller = { .wait_for_ack = true, .nr_channels = ARRAY_SIZE(stih416_powerdowns), .channels = stih416_powerdowns, }; +static struct syscfg_reset_controller_data stih416_softreset_controller = { + .wait_for_ack = false, + .active_low = true, + .nr_channels = ARRAY_SIZE(stih416_softresets), + .channels = stih416_softresets, +}; + static struct of_device_id stih416_reset_match[] = { { .compatible = "st,stih416-powerdown", .data = &stih416_powerdown_controller, }, + { .compatible = "st,stih416-softreset", + .data = &stih416_softreset_controller, }, {}, }; diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h index d7da55f..ee8ccd0 100644 --- a/include/dt-bindings/reset-controller/stih416-resets.h +++ b/include/dt-bindings/reset-controller/stih416-resets.h @@ -18,4 +18,8 @@ #define STIH416_PCIE0_POWERDOWN 9 #define STIH416_PCIE1_POWERDOWN 10 +#define STIH416_ETH0_SOFTRESET 0 +#define STIH416_ETH1_SOFTRESET 1 +#define STIH416_IRB_SOFTRESET 2 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */