From patchwork Fri Mar 14 19:25:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 3834701 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5C2CCBF540 for ; Fri, 14 Mar 2014 19:26:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7614E2034F for ; Fri, 14 Mar 2014 19:26:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5BC9A20340 for ; Fri, 14 Mar 2014 19:26:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755904AbaCNT0a (ORCPT ); Fri, 14 Mar 2014 15:26:30 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:43237 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754661AbaCNT03 (ORCPT ); Fri, 14 Mar 2014 15:26:29 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2EJPub6023201; Fri, 14 Mar 2014 14:25:56 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EJPuMh023123; Fri, 14 Mar 2014 14:25:56 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Fri, 14 Mar 2014 14:25:55 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EJPtlP015893; Fri, 14 Mar 2014 14:25:55 -0500 Received: from localhost (lta0274052.am.dhcp.ti.com [128.247.71.78]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s2EJPtt19002; Fri, 14 Mar 2014 14:25:55 -0500 (CDT) From: Dave Gerlach To: , , CC: , , , "Rafael J. Wysocki" , Jisheng Zhang , Anson Huang , Shawn Guo , Viresh Kumar , Nishanth Menon , Dave Gerlach Subject: [RFC 8/9] ARM: dts: dra7: Add opp-modifier device entry and add higher OPPs Date: Fri, 14 Mar 2014 14:25:34 -0500 Message-ID: <1394825135-60110-9-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394825135-60110-1-git-send-email-d-gerlach@ti.com> References: <1394825135-60110-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add an entry for opp-modifier which configures OPPs on 43xx. Within this, nodes are defined with the opp-modifier propety that are defined as a list of frequency, offset from base register, and efuse value. The CPU node passes a phandle to the appropriate child node to get the correct table. This patch also adds higher eFused OPPs for dra7. Signed-off-by: Dave Gerlach --- arch/arm/boot/dts/dra7.dtsi | 18 ++++++++++++++++++ include/dt-bindings/opp/ti.h | 3 +++ 2 files changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 1fd75aa..ffd0bae 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -9,6 +9,7 @@ #include #include +#include #include "skeleton.dtsi" @@ -46,7 +47,10 @@ /* kHz uV */ 1000000 1060000 1176000 1160000 + 1500000 1260000 >; + + platform-opp-modifier = <&mpu_opp_modifier>; }; cpu@1 { device_type = "cpu"; @@ -621,6 +625,20 @@ dma-names = "tx0", "rx0"; status = "disabled"; }; + + opp_modifier: opp_modifier@0x4AE0C20C { + compatible = "opp-modifier-reg-val"; + reg = <0x4AE0C20C 0x04>; + opp,reg-mask = <0x000000F7>; + + mpu_opp_modifier: mpu_opp_modifier { + opp-modifier = < + /* kHz offset value */ + 1500000 0 DRA7_EFUSE_HAS_HIGH_MPU_OPP + 1176000 0 DRA7_EFUSE_HAS_OD_MPU_OPP + >; + }; + }; }; }; diff --git a/include/dt-bindings/opp/ti.h b/include/dt-bindings/opp/ti.h index cb62c32..0f5efe8 100644 --- a/include/dt-bindings/opp/ti.h +++ b/include/dt-bindings/opp/ti.h @@ -27,4 +27,7 @@ #define OMAP4_EFUSE_HAS_PERF_SILICON_BIT (1 << 17) +#define DRA7_EFUSE_HAS_OD_MPU_OPP 11 +#define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15 + #endif /* __DT_BINDINGS_OPP_TI_H__ */