From patchwork Wed Jun 11 01:17:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonghwa Lee X-Patchwork-Id: 4333041 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 69386BEEAA for ; Wed, 11 Jun 2014 01:18:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7130D20218 for ; Wed, 11 Jun 2014 01:18:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 23123201FE for ; Wed, 11 Jun 2014 01:18:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752290AbaFKBSE (ORCPT ); Tue, 10 Jun 2014 21:18:04 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:63311 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751255AbaFKBSC (ORCPT ); Tue, 10 Jun 2014 21:18:02 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N6Z00HTBCY03Y80@mailout1.samsung.com> for linux-pm@vger.kernel.org; Wed, 11 Jun 2014 10:18:00 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.115]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id EE.AD.19452.84EA7935; Wed, 11 Jun 2014 10:18:00 +0900 (KST) X-AuditID: cbfee68e-b7fb96d000004bfc-c9-5397ae4864b0 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id DA.6C.07139.74EA7935; Wed, 11 Jun 2014 10:17:59 +0900 (KST) Received: from localhost.localdomain ([10.252.82.199]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N6Z00LDBCXX4280@mmp1.samsung.com>; Wed, 11 Jun 2014 10:17:59 +0900 (KST) From: Jonghwa Lee To: linux-pm@vger.kernel.org Cc: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, cw00.choi@samsung.com, Jonghwa Lee Subject: [PATCH 1/3] devfreq: exynos4_bus: Enable PPMU's source clock before use. Date: Wed, 11 Jun 2014 10:17:54 +0900 Message-id: <1402449476-6782-2-git-send-email-jonghwa3.lee@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1402449476-6782-1-git-send-email-jonghwa3.lee@samsung.com> References: <1402449476-6782-1-git-send-email-jonghwa3.lee@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNLMWRmVeSWpSXmKPExsWyRsSkWNdj3fRgg0VL2Cyuf3nOatF59gmz xdmmN+wWn3uPMFrcblzB5sDq0bdlFaPH501yAUxRXDYpqTmZZalF+nYJXBnHXp5nLHgiUrF/ Sj9TA+MKwS5GTg4JAROJhQ/3skPYYhIX7q1n62Lk4hASWMoocfXdZnaYopu/P7GB2EICixgl fkwKhihqY5I4sGcyK0iCTUBH4v++m2ANIgIyElOv7AeLMwtUSDRf+s3SxcjBISwQLPH+nSVI mEVAVeLQ7O9gM3kF3CXaHk5iBSmREFCQmDPJBiTMKeAh8fTrH6i17hLbzi1iAlkrIfCdTeLJ r8+MEHMEJL5NPsQC0SsrsekAM8TJkhIHV9xgmcAovICRYRWjaGpBckFxUnqRkV5xYm5xaV66 XnJ+7iZGYMCe/vesbwfjzQPWhxiTgcZNZJYSTc4HBnxeSbyhsZmRhamJqbGRuaUZacJK4ryL HiYFCQmkJ5akZqemFqQWxReV5qQWH2Jk4uCUamD0vPR6WgjfqeWrhQx5ZS+sO3v5jJplk/Rk i+mqS5bf3JnPtdo+j+HYyzKVYP6Qs4++XvJbveeW3IxSo/ytbvfXfjgptbSd+8DUw2cXFRvc 12pXOHV/2v/ngruVH/c3zqlWP8Si/uWV/Ny1YjFLXp/3P59y5I/2EpXCiz/v/f99LC2xw9zn afmPZiWW4oxEQy3mouJEAPZB4i9uAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBIsWRmVeSWpSXmKPExsVy+t9jAV33ddODDU5ctbG4/uU5q0Xn2SfM Fmeb3rBbfO49wmhxu3EFmwOrR9+WVYwenzfJBTBFNTDaZKQmpqQWKaTmJeenZOal2yp5B8c7 x5uaGRjqGlpamCsp5CXmptoqufgE6Lpl5gCtU1IoS8wpBQoFJBYXK+nbYZoQGuKmawHTGKHr GxIE12NkgAYS1jBmHHt5nrHgiUjF/in9TA2MKwS7GDk5JARMJG7+/sQGYYtJXLi3HswWEljE KPFjUnAXIxeQ3cYkcWDPZFaQBJuAjsT/fTfZQWwRARmJqVf2g8WZBSokmi/9Zuli5OAQFgiW eP/OEiTMIqAqcWj2d7CZvALuEm0PJ7GClEgIKEjMmWQDEuYU8JB4+vUP1Fp3iW3nFjFNYORd wMiwilE0tSC5oDgpPddIrzgxt7g0L10vOT93EyM4Hp5J72Bc1WBxiFGAg1GJh1dCenqwEGti WXFl7iFGCQ5mJRFemzSgEG9KYmVValF+fFFpTmrxIcZkoKMmMkuJJucDYzWvJN7Q2MTMyNLI 3NDCyNicNGElcd6DrdaBQgLpiSWp2ampBalFMFuYODilGhh7XC/6GD8UvKrDduVjpEd6yhWb ZuVFT7dPXLWu6mLhc96Vy1u03a42JC35rL7jjn/5jSlzmsIiQ6/3L0r5v+539q7/3bv36Zfd TjVZfHRdwWv3b6788105pLaYRM/uTl507MWu67NXf5okJv/0qVpiR5y0mPrdtUfeRwqFnOp7 Nf+PScJhtr23lViKMxINtZiLihMBYVdlMssCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Current exynos4_bus driver uses PPMUs for DMC0/1 to gauge bus utilization, and they has own operation clock. It's needed to be enabled before use. While it isn't gated by default, we should assure if clock is gated. It'll find related clocks with given name, and if it fails to find then assumes that they are enabled and keeps probing. Otherwise, it'll try to enable them and exit the probing unless clocks are enabled successfully. Signed-off-by: Jonghwa Lee Signed-off-by: Chanwoo Choi Signed-off-by: Myungjoo Ham --- drivers/devfreq/exynos/exynos4_bus.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/devfreq/exynos/exynos4_bus.c b/drivers/devfreq/exynos/exynos4_bus.c index d9b08d3..cadad03 100644 --- a/drivers/devfreq/exynos/exynos4_bus.c +++ b/drivers/devfreq/exynos/exynos4_bus.c @@ -24,6 +24,7 @@ #include #include #include +#include #include @@ -79,6 +80,7 @@ struct busfreq_data { struct regulator *vdd_mif; /* Exynos4412/4212 only */ struct busfreq_opp_info curr_oppinfo; struct busfreq_ppmu_data ppmu_data; + struct clk *clk_ppmu[PPMU_END]; struct notifier_block pm_notifier; struct mutex lock; @@ -955,6 +957,28 @@ static int exynos4_busfreq_probe(struct platform_device *pdev) } } + data->clk_ppmu[PPMU_DMC0] = devm_clk_get(dev, "ppmudmc0"); + if (IS_ERR(data->clk_ppmu[PPMU_DMC0])) { + dev_warn(dev, "Cannot get ppmudmc0 clock\n"); + } else { + err = clk_prepare_enable(data->clk_ppmu[PPMU_DMC0]); + if (err) { + dev_err(dev, "Cannot enable ppmudmc0 clock\n"); + return err; + } + } + + data->clk_ppmu[PPMU_DMC1] = devm_clk_get(dev, "ppmudmc1"); + if (IS_ERR(data->clk_ppmu[PPMU_DMC1])) { + dev_warn(dev, "Cannot get ppmudmc1 clock\n"); + } else { + err = clk_prepare_enable(data->clk_ppmu[PPMU_DMC1]); + if (err) { + dev_err(dev, "Cannot enable ppmudmc0 clock\n"); + return err; + } + } + rcu_read_lock(); opp = dev_pm_opp_find_freq_floor(dev, &exynos4_devfreq_profile.initial_freq); @@ -1001,6 +1025,10 @@ static int exynos4_busfreq_probe(struct platform_device *pdev) static int exynos4_busfreq_remove(struct platform_device *pdev) { struct busfreq_data *data = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < PPMU_END; i++) + clk_disable_unprepare(data->clk_ppmu[i]); /* Unregister all of notifier chain */ unregister_pm_notifier(&data->pm_notifier);