diff mbox

[06/16] ARM: mvebu: Rename the armada_370_xp into mvebu_v7 in pmsu.c file

Message ID 1403875377-940-7-git-send-email-gregory.clement@free-electrons.com (mailing list archive)
State Not Applicable, archived
Headers show

Commit Message

Gregory CLEMENT June 27, 2014, 1:22 p.m. UTC
Actually most of the function related to the PMSU are not specific to
the Armada 370 or Armada XP SoCs, but can also be used for most of the
other mvebu ARMv7 SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm/mach-mvebu/pmsu.c | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

Comments

Thomas Petazzoni June 30, 2014, 12:57 p.m. UTC | #1
Dear Gregory CLEMENT,

On Fri, 27 Jun 2014 15:22:47 +0200, Gregory CLEMENT wrote:
> Actually most of the function related to the PMSU are not specific to
> the Armada 370 or Armada XP SoCs, but can also be used for most of the
> other mvebu ARMv7 SoCs.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  arch/arm/mach-mvebu/pmsu.c | 40 ++++++++++++++++++++--------------------
>  1 file changed, 20 insertions(+), 20 deletions(-)

I'm fine on the principle, but this badly conflicts with the PMSU
changes I've made to support CPU hotplug, which are already in
linux-next. See
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/log/arch/arm/mach-mvebu/pmsu.c.

>  /* No locking is needed because we only access per-CPU registers */
> -void armada_370_xp_pmsu_idle_prepare(bool deepidle)
> +static void mvebu_v7_pmsu_idle_prepare(bool deepidle)

Also, note here that you're not only renaming, but also adding the
'static' qualifier. This is already done in linux-next by
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/arch/arm/mach-mvebu/pmsu.c?id=adb1d99384c7480886153a97d2ea22e9c0d2e053,
but the function is anyway renamed in
http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/arch/arm/mach-mvebu/pmsu.c?id=bbb92284b6c821e9434223d437fbd10b8a24c294
as a preparation for CPU hotplug support.

> -static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
> +static noinline int do_armada_xp_370_cpu_suspend(unsigned long deepidle)

This does not seem like a rename to mvebu_v7.

>  {
> -	armada_370_xp_pmsu_idle_prepare(deepidle);
> +	mvebu_v7_pmsu_idle_prepare(deepidle);
>  
>  	v7_exit_coherency_flush(all);
>  
> @@ -248,13 +248,13 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
>  	return 0;
>  }
>  
> -static int armada_370_xp_cpu_suspend(unsigned long deepidle)
> +static int armada_xp_370_cpu_suspend(unsigned long deepidle)

Ditto.

>  {
> -	return cpu_suspend(deepidle, do_armada_370_xp_cpu_suspend);
> +	return cpu_suspend(deepidle, do_armada_xp_370_cpu_suspend);

Ditto.

Thomas
Gregory CLEMENT July 3, 2014, 8:47 a.m. UTC | #2
On 30/06/2014 14:57, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
> 
> On Fri, 27 Jun 2014 15:22:47 +0200, Gregory CLEMENT wrote:
>> Actually most of the function related to the PMSU are not specific to
>> the Armada 370 or Armada XP SoCs, but can also be used for most of the
>> other mvebu ARMv7 SoCs.
>>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> ---
>>  arch/arm/mach-mvebu/pmsu.c | 40 ++++++++++++++++++++--------------------
>>  1 file changed, 20 insertions(+), 20 deletions(-)
> 
> I'm fine on the principle, but this badly conflicts with the PMSU
> changes I've made to support CPU hotplug, which are already in
> linux-next. See
> http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/log/arch/arm/mach-mvebu/pmsu.c.
> 
>>  /* No locking is needed because we only access per-CPU registers */
>> -void armada_370_xp_pmsu_idle_prepare(bool deepidle)
>> +static void mvebu_v7_pmsu_idle_prepare(bool deepidle)
> 
> Also, note here that you're not only renaming, but also adding the
> 'static' qualifier. This is already done in linux-next by
> http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/arch/arm/mach-mvebu/pmsu.c?id=adb1d99384c7480886153a97d2ea22e9c0d2e053,
> but the function is anyway renamed in
> http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/arch/arm/mach-mvebu/pmsu.c?id=bbb92284b6c821e9434223d437fbd10b8a24c294
> as a preparation for CPU hotplug support.

I am rebasing this series onto mvebu/fixes and mvebu/soc.
I take care of all your remark during this rebasing.
diff mbox

Patch

diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index cdc6d87d0b49..087157c20b8a 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -79,7 +79,7 @@  extern void armada_370_xp_cpu_resume(void);
 static unsigned long pmsu_mp_phys_base;
 static void __iomem *pmsu_mp_base;
 
-static struct platform_device armada_xp_cpuidle_device = {
+static struct platform_device mvebu_v7_cpuidle_device = {
 	.name = "cpuidle-armada-370-xp",
 };
 
@@ -118,7 +118,7 @@  void mvebu_boot_addr_wa(int crypto_eng_id, u32 resume_addr_reg)
 	*(unsigned long *)(sram_virt_base + code_len - 4) = resume_addr_reg;
 }
 
-static int __init armada_370_xp_pmsu_init(void)
+static int __init mvebu_v7_pmsu_init(void)
 {
 	struct device_node *np;
 	struct resource res;
@@ -164,7 +164,7 @@  static int __init armada_370_xp_pmsu_init(void)
 	return ret;
 }
 
-static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
+static void mvebu_v7_pmsu_enable_l2_powerdown_onidle(void)
 {
 	u32 reg;
 
@@ -178,7 +178,7 @@  static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
 }
 
 /* No locking is needed because we only access per-CPU registers */
-void armada_370_xp_pmsu_idle_prepare(bool deepidle)
+static void mvebu_v7_pmsu_idle_prepare(bool deepidle)
 {
 	unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
 	u32 reg;
@@ -215,9 +215,9 @@  void armada_370_xp_pmsu_idle_prepare(bool deepidle)
 	writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));
 }
 
-static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
+static noinline int do_armada_xp_370_cpu_suspend(unsigned long deepidle)
 {
-	armada_370_xp_pmsu_idle_prepare(deepidle);
+	mvebu_v7_pmsu_idle_prepare(deepidle);
 
 	v7_exit_coherency_flush(all);
 
@@ -248,13 +248,13 @@  static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
 	return 0;
 }
 
-static int armada_370_xp_cpu_suspend(unsigned long deepidle)
+static int armada_xp_370_cpu_suspend(unsigned long deepidle)
 {
-	return cpu_suspend(deepidle, do_armada_370_xp_cpu_suspend);
+	return cpu_suspend(deepidle, do_armada_xp_370_cpu_suspend);
 }
 
 /* No locking is needed because we only access per-CPU registers */
-static noinline void armada_370_xp_pmsu_idle_restore(void)
+static noinline void mvebu_v7_pmsu_idle_restore(void)
 {
 	unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
 	u32 reg;
@@ -276,24 +276,24 @@  static noinline void armada_370_xp_pmsu_idle_restore(void)
 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
 }
 
-static int armada_370_xp_cpu_pm_notify(struct notifier_block *self,
+static int mvebu_v7_cpu_pm_notify(struct notifier_block *self,
 				    unsigned long action, void *hcpu)
 {
 	if (action == CPU_PM_ENTER) {
 		unsigned int hw_cpu = cpu_logical_map(smp_processor_id());
 		mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_370_xp_cpu_resume);
 	} else if (action == CPU_PM_EXIT) {
-		armada_370_xp_pmsu_idle_restore();
+		mvebu_v7_pmsu_idle_restore();
 	}
 
 	return NOTIFY_OK;
 }
 
-static struct notifier_block armada_370_xp_cpu_pm_notifier = {
-	.notifier_call = armada_370_xp_cpu_pm_notify,
+static struct notifier_block mvebu_v7_cpu_pm_notifier = {
+	.notifier_call = mvebu_v7_cpu_pm_notify,
 };
 
-int __init armada_370_xp_cpu_pm_init(void)
+static int __init mvebu_v7_cpu_pm_init(void)
 {
 	struct device_node *np;
 
@@ -328,13 +328,13 @@  int __init armada_370_xp_cpu_pm_init(void)
 		mvebu_boot_addr_wa(ARMADA_370_CRYPT0_ENG_ID, pmsu_mp_phys_base +
 				PMSU_BOOT_ADDR_REDIRECT_OFFSET(0));
 
-	armada_370_xp_pmsu_enable_l2_powerdown_onidle();
-	armada_xp_cpuidle_device.dev.platform_data = armada_370_xp_cpu_suspend;
-	platform_device_register(&armada_xp_cpuidle_device);
-	cpu_pm_register_notifier(&armada_370_xp_cpu_pm_notifier);
+	mvebu_v7_pmsu_enable_l2_powerdown_onidle();
+	mvebu_v7_cpuidle_device.dev.platform_data = armada_xp_370_cpu_suspend;
+	platform_device_register(&mvebu_v7_cpuidle_device);
+	cpu_pm_register_notifier(&mvebu_v7_cpu_pm_notifier);
 
 	return 0;
 }
 
-arch_initcall(armada_370_xp_cpu_pm_init);
-early_initcall(armada_370_xp_pmsu_init);
+arch_initcall(mvebu_v7_cpu_pm_init);
+early_initcall(mvebu_v7_pmsu_init);