From patchwork Sat Nov 1 02:44:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wang Caesar X-Patchwork-Id: 5208181 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 734D6C11AC for ; Sat, 1 Nov 2014 02:52:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 86B832015A for ; Sat, 1 Nov 2014 02:52:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8D9B62014A for ; Sat, 1 Nov 2014 02:52:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760499AbaKACwb (ORCPT ); Fri, 31 Oct 2014 22:52:31 -0400 Received: from va-smtp01.263.net ([54.88.144.211]:51348 "EHLO va-smtp01.263.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760487AbaKACw3 (ORCPT ); Fri, 31 Oct 2014 22:52:29 -0400 Received: from localhost (localhost.localdomain [127.0.0.1]) by va-smtp01.263.net (Postfix) with ESMTP id 03CBA7F916; Sat, 1 Nov 2014 10:52:16 +0800 (CST) X-RL-SENDER: wxt@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: wxt@rock-chips.com X-UNIQUE-TAG: <704bc21a74ca425508b7194df3112e5e> X-SENDER: wxt@rock-chips.com X-DNS-TYPE: 0 Received: from localhost (unknown [58.22.7.114]) by va-smtp01.263.net (Postfix) whith ESMTP id 8558W6D8CP; Sat, 01 Nov 2014 10:52:16 +0800 (CST) From: Caesar Wang To: heiko@sntech.de, rui.zhang@intel.com, edubezval@gmail.com Cc: zyf@rock-chips.com, dianders@chromium.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, cf@rock-chips.com, dmitry.torokhov@gmail.com, dbasehore@chromium.org, huangtao@rock-chips.com, cjf@rock-chips.com, zhengsq@rock-chips.com, fzf@rock-chips.com, Caesar Wang Subject: [PATCH v17 4/5] ARM: dts: add main Thermal info to rk3288 Date: Sat, 1 Nov 2014 10:44:32 +0800 Message-Id: <1414809873-32227-5-git-send-email-caesar.wang@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414809873-32227-1-git-send-email-caesar.wang@rock-chips.com> References: <1414809873-32227-1-git-send-email-caesar.wang@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is depend on rk3288-thermal.dtsi,or it will compile error. If for some reason we are unable to shut it down in orderly fashion (kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature over a period of time High,over 105C the resulting TSHUT gave CRU module,let it reset the entire chip,or via GPIO give PMIC. Signed-off-by: Caesar Wang Reviewed-by: Dmitry Torokhov --- arch/arm/boot/dts/rk3288.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index cb18bb4..85855a6 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -15,6 +15,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -66,6 +67,7 @@ 216000 900000 126000 900000 >; + #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; @@ -346,6 +348,23 @@ status = "disabled"; }; + thermal-zones { + #include "rk3288-thermal.dtsi" + }; + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&otp_out>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <105000>; + status = "disabled"; + }; + usb_host0_ehci: usb@ff500000 { compatible = "generic-ehci"; reg = <0xff500000 0x100>; @@ -965,6 +984,12 @@ }; }; + tsadc { + otp_out: otp-out { + rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + pwm0 { pwm0_pin: pwm0-pin { rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;