From patchwork Fri Nov 14 11:17:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 5305101 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8F2EFC11AC for ; Fri, 14 Nov 2014 11:19:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 94D7F2015D for ; Fri, 14 Nov 2014 11:19:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A5B4420103 for ; Fri, 14 Nov 2014 11:19:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965084AbaKNLTR (ORCPT ); Fri, 14 Nov 2014 06:19:17 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:51718 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965011AbaKNLTQ (ORCPT ); Fri, 14 Nov 2014 06:19:16 -0500 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NF1006IM0S2OL50@mailout4.samsung.com> for linux-pm@vger.kernel.org; Fri, 14 Nov 2014 20:19:14 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 1A.D6.19034.235E5645; Fri, 14 Nov 2014 20:19:14 +0900 (KST) X-AuditID: cbfee691-f79b86d000004a5a-b7-5465e532080c Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 80.1C.09430.235E5645; Fri, 14 Nov 2014 20:19:14 +0900 (KST) Received: from abhilash-ubuntu.sisodomain.com ([107.108.73.92]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NF100A1U0Q0B1D0@mmp2.samsung.com>; Fri, 14 Nov 2014 20:19:13 +0900 (KST) From: Abhilash Kesavan To: rui.zhang@intel.com, edubezval@gmail.com, linux-pm@vger.kernel.org Cc: b.zolnierkie@samsung.com, amit.daniel@samsung.com, kesavan.abhilash@gmail.com Subject: [PATCH 1/4] thermal: exynos: add optional sclk support Date: Fri, 14 Nov 2014 16:47:59 +0530 Message-id: <1415963882-3460-2-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1415963882-3460-1-git-send-email-a.kesavan@samsung.com> References: <1415963882-3460-1-git-send-email-a.kesavan@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLLMWRmVeSWpSXmKPExsWyRsSkTtfoaWqIwZbnkhYNV0MsNs5Yz2ox /8o1Vos1f5UsPvceYbR48rCPzYHNY+esu+wei/e8ZPLo27KK0ePzJrkAligum5TUnMyy1CJ9 uwSujA1fF7IX3FSpePfAu4GxRa6LkZNDQsBE4v2hWWwQtpjEhXvrgWwuDiGBpYwSXz7OYe9i 5AArevXEFCI+nVFiz8QZUEV9TBLf+qeyg3SzCehJLPj3lRnEFhFwk1i86B9YnFkgWGLx2TNg cWEBe4n9H58wgtgsAqoSu98eALN5BVwk/t8/zAKxTEFiziQbkDCngKvE1I9nwY4TAil5vJ4V ZK+EQDO7xMFTe9kg5ghIfJt8CKpXVmLTAWaIZyQlDq64wTKBUXgBI8MqRtHUguSC4qT0IlO9 4sTc4tK8dL3k/NxNjMBQPv3v2cQdjPcPWB9iFOBgVOLhZXBLDRFiTSwrrsw9xGgKtGEis5Ro cj4wYvJK4g2NzYwsTE1MjY3MLc2UxHl1pH8GCwmkJ5akZqemFqQWxReV5qQWH2Jk4uCUamBU 2a558nhj1NX3Mxxe3ClpFp30b8NUu5WdF+6tzW90WjA9VibFveHw+38VCarScv0rXINfXTR8 Y6mxVXLljrjbGv/P7k/bPK1LYcdH9z0+Z18+7LE/dTOe5cOl5vp1mr8YpZ5HW539Ov+SY/wO QwcLicXL+PI+t4Rv3HJTq9st6di7AyGHLN9bKrEUZyQaajEXFScCAB2m4vtgAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprOIsWRmVeSWpSXmKPExsVy+t9jQV2jp6khBmdvCVg0XA2x2DhjPavF /CvXWC3W/FWy+Nx7hNHiycM+Ngc2j52z7rJ7LN7zksmjb8sqRo/Pm+QCWKIaGG0yUhNTUosU UvOS81My89JtlbyD453jTc0MDHUNLS3MlRTyEnNTbZVcfAJ03TJzgHYrKZQl5pQChQISi4uV 9O0wTQgNcdO1gGmM0PUNCYLrMTJAAwlrGDM2fF3IXnBTpeLdA+8Gxha5LkYODgkBE4lXT0y7 GDmBTDGJC/fWs3UxcnEICUxnlNgzcQaU08ck8a1/KjtIFZuAnsSCf1+ZQWwRATeJxYv+gcWZ BYIlFp89AxYXFrCX2P/xCSOIzSKgKrH77QEwm1fAReL//cMsEIsVJOZMsgEJcwq4Skz9eJYN xBYCKXm8nnUCI+8CRoZVjKKpBckFxUnpuUZ6xYm5xaV56XrJ+bmbGMGR8kx6B+OqBotDjAIc jEo8vIxuqSFCrIllxZW5hxglOJiVRHh/XgEK8aYkVlalFuXHF5XmpBYfYjQFOmois5Rocj4w ivNK4g2NTcxNjU0tTSxMzCyVxHkPtloHCgmkJ5akZqemFqQWwfQxcXBKNTD6ztkv+9K7YobW ScVbj1f8O1yg8ufjrNf7fs+cu5P9zep7LiIcv1wcOM3XND87xqaVE7ii+1GA2VI9sUuvnD/X uGrUKT0OyQ69ZBAov+aUWNhq/SDRR7kFT6aKvrsrPWFGQMj+181pqd8sjJjfNimmB4S3h957 vZNtwZInM12PH9W5zyihXG+uxFKckWioxVxUnAgAmULr16oCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos7 has a special clock required for the functional operation of the TMU that is not present in earlier SoCs. Add support for this optional clock and update the binding documentation. Signed-off-by: Abhilash Kesavan --- .../devicetree/bindings/thermal/exynos-thermal.txt | 3 ++ drivers/thermal/samsung/exynos_tmu.c | 29 ++++++++++++++++---- 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index ae738f5..2393eac 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -32,10 +32,13 @@ - clocks : The main clocks for TMU device -- 1. operational clock for TMU channel -- 2. optional clock to access the shared registers of TMU channel + -- 3. optional special clock for functional operation - clock-names : Thermal system clock name -- "tmu_apbif" operational clock for current TMU channel -- "tmu_triminfo_apbif" clock to access the shared triminfo register for current TMU channel + -- "tmu_sclk" clock for functional operation of the current TMU + channel - vtmu-supply: This entry is optional and provides the regulator node supplying voltage to TMU. If needed this entry can be placed inside board/platform specific dts file. diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 1e7d073..c8caf5b 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -48,6 +48,7 @@ * @lock: lock to implement synchronization. * @clk: pointer to the clock structure. * @clk_sec: pointer to the clock structure for accessing the base_second. + * @sclk: pointer to the clock structure for accessing the tmu special clk. * @temp_error1: fused value of the first point trim. * @temp_error2: fused value of the second point trim. * @regulator: pointer to the TMU regulator structure. @@ -62,7 +63,7 @@ struct exynos_tmu_data { enum soc_type soc; struct work_struct irq_work; struct mutex lock; - struct clk *clk, *clk_sec; + struct clk *clk, *clk_sec, *sclk; u8 temp_error1, temp_error2; struct regulator *regulator; struct thermal_sensor_conf *reg_conf; @@ -625,6 +626,17 @@ static int exynos_tmu_probe(struct platform_device *pdev) goto err_clk_sec; } + data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk"); + if (IS_ERR(data->sclk)) { + dev_err(&pdev->dev, "Failed to get optional special clock\n"); + } else { + ret = clk_prepare_enable(data->sclk); + if (ret) { + dev_err(&pdev->dev, "Failed to enable special clock\n"); + goto err_clk; + } + } + if (pdata->type == SOC_ARCH_EXYNOS3250 || pdata->type == SOC_ARCH_EXYNOS4210 || pdata->type == SOC_ARCH_EXYNOS4412 || @@ -636,13 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev) else { ret = -EINVAL; dev_err(&pdev->dev, "Platform not supported\n"); - goto err_clk; + goto err_sclk; } ret = exynos_tmu_initialize(pdev); if (ret) { dev_err(&pdev->dev, "Failed to initialize TMU\n"); - goto err_clk; + goto err_sclk; } exynos_tmu_control(pdev, true); @@ -652,7 +664,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) sizeof(struct thermal_sensor_conf), GFP_KERNEL); if (!sensor_conf) { ret = -ENOMEM; - goto err_clk; + goto err_sclk; } sprintf(sensor_conf->name, "therm_zone%d", data->id); sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read; @@ -684,7 +696,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) ret = exynos_register_thermal(sensor_conf); if (ret) { dev_err(&pdev->dev, "Failed to register thermal interface\n"); - goto err_clk; + goto err_sclk; } data->reg_conf = sensor_conf; @@ -692,10 +704,13 @@ static int exynos_tmu_probe(struct platform_device *pdev) IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data); if (ret) { dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq); - goto err_clk; + goto err_sclk; } return 0; +err_sclk: + if (!IS_ERR(data->sclk)) + clk_disable_unprepare(data->sclk); err_clk: clk_unprepare(data->clk); err_clk_sec: @@ -712,6 +727,8 @@ static int exynos_tmu_remove(struct platform_device *pdev) exynos_tmu_control(pdev, false); + if (!IS_ERR(data->sclk)) + clk_disable_unprepare(data->sclk); clk_unprepare(data->clk); if (!IS_ERR(data->clk_sec)) clk_unprepare(data->clk_sec);