From patchwork Tue Jun 9 21:37:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 6575291 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E0189F3D1 for ; Tue, 9 Jun 2015 21:38:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EC01520561 for ; Tue, 9 Jun 2015 21:38:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A04920558 for ; Tue, 9 Jun 2015 21:38:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932629AbbFIViU (ORCPT ); Tue, 9 Jun 2015 17:38:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49073 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753813AbbFIViT (ORCPT ); Tue, 9 Jun 2015 17:38:19 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 7B0E9C2E31; Tue, 9 Jun 2015 21:38:19 +0000 (UTC) Received: from localhost.localdomain.com (vpn1-4-113.ams2.redhat.com [10.36.4.113]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t59LcAlG010310; Tue, 9 Jun 2015 17:38:16 -0400 From: Hans de Goede To: Lee Jones , Sebastian Reichel , Dmitry Eremin-Solenikov , David Woodhouse , Kishon Vijay Abraham I , Felipe Balbi , Maxime Ripard Cc: =?UTF-8?q?Bruno=20Pr=C3=A9mont?= , linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree , linux-sunxi@googlegroups.com, Hans de Goede Subject: [PATCH 1/8] mfd: axp20x: Add missing registers, and mark more registers volatile Date: Tue, 9 Jun 2015 23:37:54 +0200 Message-Id: <1433885881-19809-2-git-send-email-hdegoede@redhat.com> In-Reply-To: <1433885881-19809-1-git-send-email-hdegoede@redhat.com> References: <1433885881-19809-1-git-send-email-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bruno Prémont Add an extra set of registers which is necessary tu support the PMICs battery charger function, and mark registers which contain status bits, gpio status, and adc readings as volatile. Cc: Bruno Prémont Signed-off-by: Hans de Goede --- drivers/mfd/axp20x.c | 6 ++++++ include/linux/mfd/axp20x.h | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 6df9155..6ffbc11 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -39,10 +39,16 @@ static const char * const axp20x_model_names[] = { static const struct regmap_range axp20x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), + regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(15)), }; static const struct regmap_range axp20x_volatile_ranges[] = { + regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), + regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), + regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), + regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), }; static const struct regmap_access_table axp20x_writeable_table = { diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index 95568eb..f4290ae 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -151,6 +151,11 @@ enum { #define AXP20X_CC_CTRL 0xb8 #define AXP20X_FG_RES 0xb9 +/* OCV */ +#define AXP20X_RDC_H 0xba +#define AXP20X_RDC_L 0xbb +#define AXP20X_OCV(m) (0xc0 + (m)) + /* AXP22X specific registers */ #define AXP22X_BATLOW_THRES1 0xe6