From patchwork Mon Jul 27 15:20:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 6875211 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0442AC05AC for ; Mon, 27 Jul 2015 15:21:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 782E0206F3 for ; Mon, 27 Jul 2015 15:21:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D695D206F4 for ; Mon, 27 Jul 2015 15:21:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753630AbbG0PVC (ORCPT ); Mon, 27 Jul 2015 11:21:02 -0400 Received: from mail-wi0-f172.google.com ([209.85.212.172]:37665 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754113AbbG0PUj (ORCPT ); Mon, 27 Jul 2015 11:20:39 -0400 Received: by wibud3 with SMTP id ud3so120870197wib.0 for ; Mon, 27 Jul 2015 08:20:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WRHZfIdUcTBZQ4bRfNbuRPdnWbBPI1DK92hp//OFHks=; b=L46dH4w/Y6EBeI1S5WnrU3cVLSye6tYZlobP0Vx14r/kQF69O9+EkFWNS128GKjXM8 Ex9HfIXl0LEoX4bvbI8P7MVjWS0BCZo0uijeVQ0DSE0hFCZ5hZTNfnJUfQzyOIcRSZJR eQcg4cLA6R7kxEgcaI/M8n8iSBJgr2OoOSWKdDcPWrWsJLsvUiPLyJP0vfu+TwzCAhYc 9WlYMfNETQNfwhn8eBRk9oVkeHqN48x0eWXTvZtbZRatWMDnpL2LDMy27zL4zSMbLHNh MHaopQDFKf4QWC51OCF7E1OdyvRR3GDHgPcfnvS+vUZ8B1VhA2mnds7hmNfUf+S8VAun hvbQ== X-Gm-Message-State: ALoCoQnsEHJqns4l3IWwHGP2hp6XBpBbzAHsklWU6qZUYIQ6IrFzR49F2VUIZdx2JoyPmYzkVaT0 X-Received: by 10.194.205.101 with SMTP id lf5mr61301490wjc.37.1438010438265; Mon, 27 Jul 2015 08:20:38 -0700 (PDT) Received: from localhost.localdomain (host81-129-173-55.range81-129.btcentralplus.com. [81.129.173.55]) by smtp.gmail.com with ESMTPSA id ul1sm28408275wjc.30.2015.07.27.08.20.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Jul 2015 08:20:37 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: kernel@stlinux.com, rjw@rjwysocki.net, viresh.kumar@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com, sre@kernel.org, dbaryshkov@gmail.com, Lee Jones Subject: [PATCH v4 2/2] dt: power: st: Provide bindings for ST's OPPs Date: Mon, 27 Jul 2015 16:20:30 +0100 Message-Id: <1438010430-5802-2-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438010430-5802-1-git-send-email-lee.jones@linaro.org> References: <1438010430-5802-1-git-send-email-lee.jones@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These OPPs are used in ST's CPUFreq implementation. Signed-off-by: Lee Jones --- Changelog: - None, new patch Documentation/devicetree/bindings/power/opp-st.txt | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/opp-st.txt diff --git a/Documentation/devicetree/bindings/power/opp-st.txt b/Documentation/devicetree/bindings/power/opp-st.txt new file mode 100644 index 0000000..6eb2a91 --- /dev/null +++ b/Documentation/devicetree/bindings/power/opp-st.txt @@ -0,0 +1,76 @@ +STMicroelectronics OPP (Operating Performance Points) Bindings +-------------------------------------------------------------- + +Frequency Scaling only +---------------------- + +Located in CPU's node: + +- operating-points : [See: ./opp.txt] + +Example [safe] +-------------- + +cpus { + cpu@0 { + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; + }; +}; + +Dynamic Voltage and Frequency Scaling (DVFS) +-------------------------------------------- + +Located in 'cpu0-opp-list' node [to be provided ONLY by the bootloader]: + +- compatible : Should be "operating-points-v2-sti" +- opp{1..N} : Each 'oppX' subnode will contain the following properties: + - opp-hz : CPU frequency [Hz] for this OPP [See: ./opp.txt] + - st,avs : List of available voltages [uV] indexed by process code + - st,cuts : Cut version this OPP is suitable for [0xFF means ALL] + - st,substrate : Substrate version this OPP is suitable for [0xFF means ALL] +- st,syscfg : Phandle to Major number register + First cell: offset to major number +- st,syscfg-eng : Phandle to Minor number and Pcode registers + First cell: offset to process code + Second cell: offset to minor number + +WARNING: The opp{1..N} nodes will be provided by the bootloader. Do not attempt to + artificially synthesise the opp{1..N} nodes or any of their descendants. + They are very platform specific and may damage the hardware if created + incorrectly. + +Example [unsafe] +---------------- + +cpus { + cpu@0 { + operating-points-v2 = <&cpu0_opp_list>; + }; +}; + +/* ############################################################ */ +/* # WARNING: Do not attempt to copy/replicate this node, # */ +/* # it is only to be supplied by the bootloader !!! # */ +/* ############################################################ */ +cpu0-opp-list { + compatible = "operating-points-v2-sti"; + st,syscfg = <&syscfg [major_offset]>; + st,syscfg-eng = <&syscfg_eng [pcode_offset] [minor_offset]>; + + opp0 { + opp-hz = <1200000000>; + st,avs = <1110 1150 1100 1080 1040 1020 980 930>; + st,substrate = <0xff>; + st,cuts = <0xff>; + }; + opp1 { + opp-hz = <1500000000>; + st,avs = <1200 1200 1200 1200 1170 1140 1100 1070>; + st,substrate = <0xff>; + st,cuts = <0x2>; + }; +};