From patchwork Fri Sep 4 09:01:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dawei Chien X-Patchwork-Id: 7120961 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1C1659F32B for ; Fri, 4 Sep 2015 09:03:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 28EB1207FB for ; Fri, 4 Sep 2015 09:03:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 99F6B2080A for ; Fri, 4 Sep 2015 09:03:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758584AbbIDJCY (ORCPT ); Fri, 4 Sep 2015 05:02:24 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:35283 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1758578AbbIDJCT (ORCPT ); Fri, 4 Sep 2015 05:02:19 -0400 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 112475934; Fri, 04 Sep 2015 17:02:14 +0800 Received: from mtkslt303.mediatek.inc (10.21.14.116) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 4 Sep 2015 17:02:12 +0800 From: Dawei Chien CC: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Viresh Kumar , Matthias Brugger , Daniel Kurtz , Sascha Hauer , Eddie Huang , Daniel Lezcano , Howard Chen , Dawei Chien , Yingjoe Chen , , , , , , , Sascha Hauer Subject: [PATCH 1/2] thermal: mediatek: Add cpu power cooling model Date: Fri, 4 Sep 2015 17:01:48 +0800 Message-ID: <1441357309-61669-2-git-send-email-dawei.chien@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1441357309-61669-1-git-send-email-dawei.chien@mediatek.com> References: <1441357309-61669-1-git-send-email-dawei.chien@mediatek.com> MIME-Version: 1.0 X-MTK: N To: unlisted-recipients:; (no To-header on input) Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use Intelligent Power Allocation (IPA) technical to add static/dynamic power model for binding CPU thermal zone. The power allocator governor allocates power budget to control CPU temperature. Signed-off-by: Dawei Chien --- This patch is base on https://patchwork.kernel.org/patch/7034601/ --- drivers/cpufreq/mt8173-cpufreq.c | 97 +++++++++++++++++++++++++++++++++----- 1 file changed, 86 insertions(+), 11 deletions(-) diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c index 49caed2..9233ec5 100644 --- a/drivers/cpufreq/mt8173-cpufreq.c +++ b/drivers/cpufreq/mt8173-cpufreq.c @@ -28,7 +28,8 @@ #define MAX_VOLT_SHIFT (200000) #define MAX_VOLT_LIMIT (1150000) #define VOLT_TOL (10000) - +#define CAPACITANCE_CA53 (263) +#define CAPACITANCE_CA57 (530) /* * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in @@ -51,6 +52,72 @@ struct mtk_cpu_dvfs_info { bool need_voltage_tracking; }; +struct mtk_cpu_static_power { + unsigned long voltage; + unsigned int power; +}; + +/* measured by WA program. */ +static const struct mtk_cpu_static_power mtk_ca53_static_power[] = { + {859000, 43}, + {908000, 52}, + {983000, 86}, + {1009000, 123}, + {1028000, 138}, + {1083000, 172}, + {1109000, 180}, + {1125000, 192}, +}; + +/* measured by WA program. */ +static const struct mtk_cpu_static_power mtk_ca57_static_power[] = { + {828000, 72}, + {867000, 90}, + {927000, 156}, + {968000, 181}, + {1007000, 298}, + {1049000, 435}, + {1089000, 533}, + {1125000, 533}, +}; + +unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table, + unsigned int count, unsigned long voltage) +{ + int i; + + for (i = 0; i < count; i++) { + if (voltage <= table[i].voltage) + return table[i].power; + } + + return table[count - 1].power; +} + +int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval, + unsigned long voltage, u32 *power) +{ + int nr_cpus = cpumask_weight(cpumask); + + *power = 0; + + if (nr_cpus) { + + if (cpumask_test_cpu(0, cpumask)) + *power += mtk_cpufreq_lookup_power( + mtk_ca53_static_power, + ARRAY_SIZE(mtk_ca53_static_power), + voltage); + + if (cpumask_test_cpu(2, cpumask)) + *power += mtk_cpufreq_lookup_power( + mtk_ca57_static_power, + ARRAY_SIZE(mtk_ca57_static_power), + voltage); + } + return 0; +} + static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info, int new_vproc) { @@ -272,15 +339,21 @@ static void mtk_cpufreq_ready(struct cpufreq_policy *policy) return; if (of_find_property(np, "#cooling-cells", NULL)) { - info->cdev = of_cpufreq_cooling_register(np, - policy->related_cpus); - - if (IS_ERR(info->cdev)) { - dev_err(info->cpu_dev, - "running cpufreq without cooling device: %ld\n", - PTR_ERR(info->cdev)); - - info->cdev = NULL; + u32 capacitance = cpumask_test_cpu(0, policy->related_cpus) ? + CAPACITANCE_CA53 : CAPACITANCE_CA57; + + if (!info->cdev) { + info->cdev = of_cpufreq_power_cooling_register(np, + policy->related_cpus, + capacitance, + mtk_cpufreq_get_static); + + if (IS_ERR(info->cdev)) { + dev_err(info->cpu_dev, + "running cpufreq without cooling device: %ld\n", + PTR_ERR(info->cdev)); + info->cdev = NULL; + } } } @@ -460,7 +533,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy) { struct mtk_cpu_dvfs_info *info = policy->driver_data; - cpufreq_cooling_unregister(info->cdev); + if (info->cdev) + cpufreq_cooling_unregister(info->cdev); + dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table); mtk_cpu_dvfs_info_release(info); kfree(info);