From patchwork Tue Oct 20 09:11:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7444211 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3525A9F37F for ; Tue, 20 Oct 2015 09:13:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D9E92080D for ; Tue, 20 Oct 2015 09:13:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5EF5F2082D for ; Tue, 20 Oct 2015 09:13:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751753AbbJTJLq (ORCPT ); Tue, 20 Oct 2015 05:11:46 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:34558 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751687AbbJTJLm (ORCPT ); Tue, 20 Oct 2015 05:11:42 -0400 Received: by padhk11 with SMTP id hk11so15917756pad.1; Tue, 20 Oct 2015 02:11:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H2OXur2pT3g2hKaPDqQJobKt+oyuq1EdDCFwl1S0pyc=; b=VnJYqMCPkFM3mrskVOKro5S/HxdV2Tj1z7mk+IMHzrf7jaszWlpyI4oTv6V+tf8YJM tbFyjrwWRF2z5gp5jaHx5dBZ2ZdY8+oT/QVdvcYoFl+w+mZ4xJdV+rgQPFhLfPVO99Wi /LnFYIwQYsjkb96Fa+SYFgmxyn29lNvjrCmoRjRym7XJPtXa0MJg1Im+quQU/8UmW5Yq v6aI6cp9n8UB4DgaIES9OOxM848RVDTuIgFvC3OzvZzqQX8Dh3T9L3WNPbGpPDZ7E6P0 +O/w+vFczIaizAH53NGyQZTvwJvsUDXgXfNdwJb25rWJA6REXsWmBpQRd8i1vDYJgQLG 3WUw== X-Received: by 10.68.244.34 with SMTP id xd2mr2835878pbc.0.1445332301322; Tue, 20 Oct 2015 02:11:41 -0700 (PDT) Received: from localhost.localdomain ([43.226.228.195]) by smtp.gmail.com with ESMTPSA id ez1sm2562847pab.6.2015.10.20.02.11.35 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Oct 2015 02:11:40 -0700 (PDT) From: Caesar Wang To: Eduardo Valentin , Heiko Stuebner Cc: Dmitry Torokhov , dianders@chromium.org, Caesar Wang , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Pawel Moll , Zhang Rui , Mark Rutland Subject: [PATCH 1/4] dt-bindings: Sync the dts to this document Date: Tue, 20 Oct 2015 17:11:01 +0800 Message-Id: <1445332264-6054-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445332264-6054-1-git-send-email-wxt@rock-chips.com> References: <1445332264-6054-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the OTP gpio state, we need switch the pin to gpio state before the TSADC controller is reset. Signed-off-by: Caesar Wang --- Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt index ef802de..2587f34b 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt @@ -27,8 +27,9 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "default", "otp_out"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>;