From patchwork Wed Oct 21 02:42:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7454131 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 63B019F302 for ; Wed, 21 Oct 2015 02:43:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A0BFF20914 for ; Wed, 21 Oct 2015 02:43:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C855E2090A for ; Wed, 21 Oct 2015 02:43:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753320AbbJUCn1 (ORCPT ); Tue, 20 Oct 2015 22:43:27 -0400 Received: from mail-pa0-f66.google.com ([209.85.220.66]:35082 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753308AbbJUCnY (ORCPT ); Tue, 20 Oct 2015 22:43:24 -0400 Received: by pagq8 with SMTP id q8so2881999pag.2; Tue, 20 Oct 2015 19:43:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bSMPcQrM7fk+WspHv8Lz/21looRVswssQ4+oJgEbNeQ=; b=HAAeRUWshTfCTeLGNn8HBnR+m+5TX1YqJSrOazCHwX03s7W42YQ00F2i4K+/Y/tHxx 3gxX7cI5BLT2RoMkH326C9SEupu4ehAzP32ORyNvQf8Tmi9Hd9LEa+/PlTk/44yhrHQq /O69zMf8zbzaNlrxDsy2WbPa6zAwJavRq5+WXl05R4f3bV6SaynkxxqeUdmUX4kkz5/Z ejRsGmMQYaQnlCuzQKaPWrD11e35QIHyclAUac98993fNOTSnybm8EzonEOCTb4ziZ88 7avhd839p4iWl+zREaIAhRr/Z3o7YrE4pwx1Ok+NsruIE/b7yVGEE/vXDlIqZIyuS3w5 izwg== X-Received: by 10.68.69.35 with SMTP id b3mr7917938pbu.22.1445395404123; Tue, 20 Oct 2015 19:43:24 -0700 (PDT) Received: from localhost.localdomain ([43.226.228.195]) by smtp.gmail.com with ESMTPSA id hq8sm6184944pad.35.2015.10.20.19.43.18 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Oct 2015 19:43:23 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Cc: Dmitry Torokhov , dianders@chromium.org, Eduardo Valentin , Caesar Wang , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Pawel Moll , Zhang Rui , Mark Rutland Subject: [PATCH v1 1/2] dt-bindings: Sync the dts to this document Date: Wed, 21 Oct 2015 10:42:59 +0800 Message-Id: <1445395380-5365-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445395380-5365-1-git-send-email-wxt@rock-chips.com> References: <1445395380-5365-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the OTP gpio state, we need switch the pin to gpio state before the TSADC controller is reset. Signed-off-by: Caesar Wang Reviewed-by: Douglas Anderson --- Changes in v1: - As the Doug comments, add the 'init' property to sync document. Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt index ef802de..28e84f7 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt @@ -27,8 +27,9 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "init", "default"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>;