From patchwork Mon Nov 9 04:48:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7580711 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2DD4DC05C6 for ; Mon, 9 Nov 2015 04:51:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 384CE2076E for ; Mon, 9 Nov 2015 04:51:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 379E220762 for ; Mon, 9 Nov 2015 04:51:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753381AbbKIEu1 (ORCPT ); Sun, 8 Nov 2015 23:50:27 -0500 Received: from mail-pa0-f47.google.com ([209.85.220.47]:34421 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753157AbbKIEuA (ORCPT ); Sun, 8 Nov 2015 23:50:00 -0500 Received: by padhx2 with SMTP id hx2so177778870pad.1; Sun, 08 Nov 2015 20:50:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EcmgsTEUrsAm+AoMqkfGNtfE97GfoAcko+6v/hBtyUs=; b=ZsGaNzFba9xhX/MVZruTlXqS8pxWGakQtlb3ddp5owxAMO03dWdIIM3K218GLvCzcp U8eewVOHzHmBR3n5QmtAxW/mXjV6hk0LwTiH99YPwHcOKOFDuXRvAFljlBFwPNwu1EMH 9DPhVor+JJ3xQMrZFt/gyYuAnwBTdiVwmfszAfpU9VV0NTD0c7I8x8qCUTaqD5OrA7E0 b88UaBB9GVtjfYDNbxtmG1TdOcMUaQa8EKKXBMdjESOejDbqPNDpwKlD9DngGLEPQScn pyjAQ1Ex8i6otFP6QTvNqJzycXRqdqSo4HSo1xd2TPTnE3DafHNDLp2+b4NM6HsuMZjt KloA== X-Received: by 10.68.103.227 with SMTP id fz3mr37159400pbb.159.1447044600347; Sun, 08 Nov 2015 20:50:00 -0800 (PST) Received: from localhost.localdomain ([43.226.228.153]) by smtp.gmail.com with ESMTPSA id nu5sm13403833pbb.65.2015.11.08.20.49.55 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 08 Nov 2015 20:49:59 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , Eduardo Valentin Cc: linux-rockchip@lists.infradead.org, lkp@intel.com, Caesar Wang , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhang Rui , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 07/10] thermal: rockchip: Support the RK3368 SoCs in thermal driver Date: Mon, 9 Nov 2015 12:48:59 +0800 Message-Id: <1447044542-30859-8-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447044542-30859-1-git-send-email-wxt@rock-chips.com> References: <1447044542-30859-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria of each channel can be configurable. The system has two Temperature Sensors, channel 0 is for CPU, and channel 1 is for GPU. Signed-off-by: Caesar Wang --- Changes in v4: - :%s/sort_flag/mode. - rename the 'drivers' to 'driver' in subject. Changes in v3: - :%s/flag/sort_flag - fix the rk3368 sort_flag as increment mode. Changes in v2: - remove some unused, completed on other patchs. Changes in v1: None drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 73d47f8..e845841 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -1,6 +1,9 @@ /* * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd * + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd + * Caesar Wang + * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. @@ -153,6 +156,8 @@ struct rockchip_thermal_data { #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) #define TSADCV2_DATA_MASK 0xfff +#define TSADCV3_DATA_MASK 0x3ff + #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */ @@ -201,6 +206,45 @@ static const struct tsadc_table v2_code_table[] = { {3421, 125000}, }; +static const struct tsadc_table v3_code_table[] = { + {0, -40000}, + {106, -40000}, + {108, -35000}, + {110, -30000}, + {112, -25000}, + {114, -20000}, + {116, -15000}, + {118, -10000}, + {120, -5000}, + {122, 0}, + {124, 5000}, + {126, 10000}, + {128, 15000}, + {130, 20000}, + {132, 25000}, + {134, 30000}, + {136, 35000}, + {138, 40000}, + {140, 45000}, + {142, 50000}, + {144, 55000}, + {146, 60000}, + {148, 65000}, + {150, 70000}, + {152, 75000}, + {154, 80000}, + {156, 85000}, + {158, 90000}, + {160, 95000}, + {162, 100000}, + {163, 105000}, + {165, 110000}, + {167, 115000}, + {169, 120000}, + {171, 125000}, + {TSADCV3_DATA_MASK, 125000}, +}; + static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table, int temp) { @@ -409,11 +453,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = { }, }; +static const struct rockchip_tsadc_chip rk3368_tsadc_data = { + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ + .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ + .chn_num = 2, /* two channels for tsadc */ + + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ + .tshut_temp = 95000, + + .initialize = rk_tsadcv2_initialize, + .irq_ack = rk_tsadcv2_irq_ack, + .control = rk_tsadcv2_control, + .get_temp = rk_tsadcv2_get_temp, + .set_tshut_temp = rk_tsadcv2_tshut_temp, + .set_tshut_mode = rk_tsadcv2_tshut_mode, + + .table = { + .id = v3_code_table, + .length = ARRAY_SIZE(v3_code_table), + .data_mask = TSADCV3_DATA_MASK, + .mode = ADC_INCREMENT, + }, +}; + static const struct of_device_id of_rockchip_thermal_match[] = { { .compatible = "rockchip,rk3288-tsadc", .data = (void *)&rk3288_tsadc_data, }, + { + .compatible = "rockchip,rk3368-tsadc", + .data = (void *)&rk3368_tsadc_data, + }, { /* end */ }, }; MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);