From patchwork Thu Apr 7 12:20:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 8772421 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E1EF5C0553 for ; Thu, 7 Apr 2016 12:20:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 10FED2024F for ; Thu, 7 Apr 2016 12:20:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2CD9D2020F for ; Thu, 7 Apr 2016 12:20:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756191AbcDGMUh (ORCPT ); Thu, 7 Apr 2016 08:20:37 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:43988 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756211AbcDGMUb (ORCPT ); Thu, 7 Apr 2016 08:20:31 -0400 Received: from ayla.of.borg ([84.195.106.123]) by michel.telenet-ops.be with bizsmtp id fQLV1s0052fm56U06QLVMn; Thu, 07 Apr 2016 14:20:29 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1ao8vF-000602-3Q; Thu, 07 Apr 2016 14:20:29 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1ao8vM-0003W9-BC; Thu, 07 Apr 2016 14:20:36 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: Laurent Pinchart , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 05/12] ARM: dts: r8a7794: Add SYSC PM Domains Date: Thu, 7 Apr 2016 14:20:28 +0200 Message-Id: <1460031635-13452-6-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1460031635-13452-1-git-send-email-geert+renesas@glider.be> References: <1460031635-13452-1-git-send-email-geert+renesas@glider.be> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a device node for the System Controller, and hook it up to the CPG/MSTP Clock Domain. Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven --- v4: - Add power-domains property to the sysc node, to refer to the SoC's Clock Domain, v3: - Drop power area hiearchy from DT, - Switch to "#power-domain-cells = <1>", - Drop fallback compatibility strings, v2: - Change one-line summary prefix to match current arm-soc practices, - Update compatible values. --- arch/arm/boot/dts/r8a7794.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 29a0a001f1b21a9e..722430ee58f2b3e7 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { compatible = "renesas,r8a7794"; @@ -42,6 +43,7 @@ compatible = "arm,cortex-a7"; reg = <0>; clock-frequency = <1000000000>; + power-domains = <&sysc R8A7794_PD_CA7_CPU0>; next-level-cache = <&L2_CA7>; }; @@ -50,12 +52,14 @@ compatible = "arm,cortex-a7"; reg = <1>; clock-frequency = <1000000000>; + power-domains = <&sysc R8A7794_PD_CA7_CPU1>; next-level-cache = <&L2_CA7>; }; }; L2_CA7: cache-controller@1 { compatible = "cache"; + power-domains = <&sysc R8A7794_PD_CA7_SCU>; cache-unified; cache-level = <2>; }; @@ -1244,6 +1248,13 @@ }; }; + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7794-sysc"; + reg = <0 0xe6180000 0 0x0200>; + power-domains = <&cpg_clocks>; + #power-domain-cells = <1>; + }; + ipmmu_sy0: mmu@e6280000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>;