From patchwork Fri Apr 8 04:25:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 8780311 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BC676C0554 for ; Fri, 8 Apr 2016 04:30:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D1DE12028D for ; Fri, 8 Apr 2016 04:30:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D78B32026F for ; Fri, 8 Apr 2016 04:30:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757868AbcDHE3X (ORCPT ); Fri, 8 Apr 2016 00:29:23 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:42810 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753706AbcDHEZU (ORCPT ); Fri, 8 Apr 2016 00:25:20 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O5A0244ZSA1MIB0@mailout3.samsung.com>; Fri, 08 Apr 2016 13:25:13 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.115]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 8C.72.04785.9A237075; Fri, 8 Apr 2016 13:25:13 +0900 (KST) X-AuditID: cbfee68e-f79d96d0000012b1-f8-570732a97b1f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 49.D6.06699.9A237075; Fri, 8 Apr 2016 13:25:13 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O5A00DKDS9YHX20@mmp2.samsung.com>; Fri, 08 Apr 2016 13:25:13 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, linux.amoon@gmail.com, m.reichl@fivetechno.de, tjakobi@math.uni-bielefeld.de, inki.dae@samsung.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v8 11/20] ARM: dts: Add DMC bus node for Exynos3250 Date: Fri, 08 Apr 2016 13:25:00 +0900 Message-id: <1460089509-16260-12-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1460089509-16260-1-git-send-email-cw00.choi@samsung.com> References: <1460089509-16260-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPIsWRmVeSWpSXmKPExsWyRsSkWHelEXu4we0zOhbXvzxntZh/5Byr Rf+bhawW516tZLSYdH8Ci8XrF4YW/Y9fM1ucbXrDbrHp8TVWi8u75rBZfO49wmgx4/w+Jot1 G2+xW9y+zGvx8sgPRoul1y8yWdxuXMFmMWH6WhaLM6cvsVq07j3CbtG2+gOrg6jHmnlrGD1a mnvYPC739TJ53LpT77Fz1l12j5XLv7B5bFrVyeaxeUm9x79j7B5brrazePRtWcXo8XmTXABP FJdNSmpOZllqkb5dAlfG9dUXmAu+81ase3eRsYHxN1cXIyeHhICJRGv7diYIW0ziwr31bF2M XBxCAisYJQ4unQ2U4AArevDKACI+i1Hi5eRDjBDOF0aJ77sXsIJ0swloSex/cYMNxBYRSJF4 /PAk2CRmgSPMElM33gBbISzgLHG08zQLiM0ioCrxduNCZpANvAJuEtvPuUJcISfxYc8jdhCb Eyg8+cokZhBbSMBV4sbm6cwgMyUEdnBI3Fu7jhFijoDEt8mHWCAulZXYdIAZYo6kxMEVN1gm MAovYGRYxSiaWpBcUJyUXmSkV5yYW1yal66XnJ+7iREYr6f/PevbwXjzgPUhRgEORiUe3gvv 2cKFWBPLiitzDzGaAm2YyCwlmpwPTAp5JfGGxmZGFqYmpsZG5pZmSuK8CVI/g4UE0hNLUrNT UwtSi+KLSnNSiw8xMnFwSjUwMokIVqTbalXtmHzFWWXty/b4I8nburvlY/eFrv4a5l15798j F7W7S6Q/6p2++9VZ7++35hWuNe1xYSfTdb7ubJjS8an8tWaq29NIW/+ej2lHbdfu+Lzmxa3f zyrEj2Us6Ct9bpGT/XRSqoFc2otHd9cn3mCT5+Cd+HCbmslN7ehJNRxrfx/+rMRSnJFoqMVc VJwIANM5ldLSAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphleLIzCtJLcpLzFFi42I5/e+xoO5KI/ZwgwVT1Cyuf3nOajH/yDlW i/43C1ktzr1ayWgx6f4EFovXLwwt+h+/ZrY42/SG3WLT42usFpd3zWGz+Nx7hNFixvl9TBbr Nt5it7h9mdfi5ZEfjBZLr19ksrjduILNYsL0tSwWZ05fYrVo3XuE3aJt9QdWB1GPNfPWMHq0 NPeweVzu62XyuHWn3mPnrLvsHiuXf2Hz2LSqk81j85J6j3/H2D22XG1n8ejbsorR4/MmuQCe qAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygX5UU yhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYEwfUYGaCBhDWMGddXX2Au+M5bse7dRcYGxt9c XYwcHBICJhIPXhl0MXICmWISF+6tZ+ti5OIQEpjFKPFy8iFGCOcLo8T33QtYQarYBLQk9r+4 wQZiiwikSDx+eBKsg1ngCLPE1I03mEASwgLOEkc7T7OA2CwCqhJvNy5kBtnGK+Amsf2cK8Q2 OYkPex6xg9icQOHJVyYxg9hCAq4SNzZPZ57AyLuAkWEVo0RqQXJBcVJ6rlFearlecWJucWle ul5yfu4mRnBKeCa9g/HwLvdDjAIcjEo8vBfes4ULsSaWFVfmHmKU4GBWEuF11WcPF+JNSays Si3Kjy8qzUktPsRoCnTXRGYp0eR8YLrKK4k3NDYxM7I0Mje0MDI2VxLnffx/XZiQQHpiSWp2 ampBahFMHxMHp1QDo3vpAv4oNunYqxeiNHjWfZcVLuSTPM0hnaWWJsEoYpCk+Xb3pwjN4v3N Uit5YyK3NeTV35/Iu1007vKmGWonQ/x3GIaUBK5+cks10DYoreJCzckpt19xlmhPdun8LVh/ ymOi3qw/R4r2xfFcqHppe71qIt/NJL+dZiw65mdD+LRPJoWdvDhJiaU4I9FQi7moOBEAqcze 4h8DAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard SDRAM devices. The bus includes the OPP tables and the source clock for DMC block. Following list specifies the detailed relation between the clock and DMC block: - The source clock of DMC block : div_dmc Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski Acked-by: MyungJoo Ham --- arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 137f9015d4e8..1ae72c4fa55e 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -688,6 +688,40 @@ clock-names = "ppmu"; status = "disabled"; }; + + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_dmc CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp@50000000 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <800000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <800000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <800000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000>; + }; + }; }; };