From patchwork Fri Apr 22 10:02:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 8908521 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 952E0BF29F for ; Fri, 22 Apr 2016 10:05:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B1C4920160 for ; Fri, 22 Apr 2016 10:05:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 33ACA20155 for ; Fri, 22 Apr 2016 10:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752217AbcDVKDb (ORCPT ); Fri, 22 Apr 2016 06:03:31 -0400 Received: from mail-pa0-f68.google.com ([209.85.220.68]:35803 "EHLO mail-pa0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753441AbcDVKDa (ORCPT ); Fri, 22 Apr 2016 06:03:30 -0400 Received: by mail-pa0-f68.google.com with SMTP id zy2so9889260pac.2; Fri, 22 Apr 2016 03:03:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=R5v8pBTDXS3NmYZ8qhebAC8tYdBqSm88YXE4VU8e4q8=; b=TQwwtjhr+jAnUSctCFb38yr0GxxlIN9aQAJwPbMja1qHmFy3NJ6KyEdWi+f2YmG0wu 14B8/eI2DshnfGvQ7BNCYG7wpVDnXB9Cj3WDq7efTinJZjvATBYuMWw1Zo+r6uhkm/my KkKZ8f2DAiWsRnbLSgnwcn+7nENYcp2iuiX1yWz5wv6V24RdQux8cxFaVCbPAk3u1WND uzzRkS7D0UgjI+9hsILFzeZrkMKcT96oxPv0/nhsRMdXRwoBukAgcMNHxikomCoNMt8G nj9Kqof+dVFnKknSF/DcrN+KK03hcAJsI/JQPLEpcGIBUTqbwFVShdwITK4ZujX38Xeg p77g== X-Gm-Message-State: AOPr4FXDKLK6FFiDepQIEWQ/ZryPAXyvymJBB2M5Hn3D88iueSn5JJlwte5aKNa+c8ZuKg== X-Received: by 10.66.156.232 with SMTP id wh8mr27227295pab.153.1461319409434; Fri, 22 Apr 2016 03:03:29 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id 27sm7132490pfo.58.2016.04.22.03.03.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Apr 2016 03:03:28 -0700 (PDT) From: Caesar Wang To: edubezval@gmail.com, Heiko Stuebner Cc: dianders@chromium.org, briannorris@google.com, smbarber@google.com, linux-rockchip@lists.infradead.org, Elaine Zhang , Caesar Wang , Zhang Rui , linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RESEND PATCH 5/8] thermal: rockchip: Support RK3366 SoCs in the thermal driver Date: Fri, 22 Apr 2016 18:02:51 +0800 Message-Id: <1461319374-10024-6-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461319374-10024-1-git-send-email-wxt@rock-chips.com> References: <1461319374-10024-1-git-send-email-wxt@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Elaine Zhang The RK3366 SoCs have two Temperature Sensors, channel 0 is for CPU channel 1 is for GPU. Signed-off-by: Elaine Zhang Signed-off-by: Caesar Wang --- drivers/thermal/rockchip_thermal.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 6436c00..3f1e5d4 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -685,6 +685,30 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = { }, }; +static const struct rockchip_tsadc_chip rk3366_tsadc_data = { + .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ + .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ + .chn_num = 2, /* two channels for tsadc */ + + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ + .tshut_temp = 95000, + + .initialize = rk_tsadcv3_initialize, + .irq_ack = rk_tsadcv3_irq_ack, + .control = rk_tsadcv3_control, + .get_temp = rk_tsadcv2_get_temp, + .set_tshut_temp = rk_tsadcv2_tshut_temp, + .set_tshut_mode = rk_tsadcv2_tshut_mode, + + .table = { + .id = rk3228_code_table, + .length = ARRAY_SIZE(rk3228_code_table), + .data_mask = TSADCV3_DATA_MASK, + .mode = ADC_INCREMENT, + }, +}; + static const struct rockchip_tsadc_chip rk3368_tsadc_data = { .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */ .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */ @@ -743,6 +767,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = { .data = (void *)&rk3288_tsadc_data, }, { + .compatible = "rockchip,rk3366-tsadc", + .data = (void *)&rk3366_tsadc_data, + }, + { .compatible = "rockchip,rk3368-tsadc", .data = (void *)&rk3368_tsadc_data, },