From patchwork Mon Apr 25 06:56:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 8923491 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 586539F1C1 for ; Mon, 25 Apr 2016 06:57:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 80BE4201D3 for ; Mon, 25 Apr 2016 06:57:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8248520165 for ; Mon, 25 Apr 2016 06:57:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753479AbcDYG5b (ORCPT ); Mon, 25 Apr 2016 02:57:31 -0400 Received: from regular1.263xmail.com ([211.150.99.131]:47077 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753458AbcDYG5a (ORCPT ); Mon, 25 Apr 2016 02:57:30 -0400 Received: from andy.yan?rock-chips.com (unknown [192.168.167.232]) by regular1.263xmail.com (Postfix) with SMTP id C05A96431; Mon, 25 Apr 2016 14:57:21 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-KSVirus-check: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 4895D3B5C; Mon, 25 Apr 2016 14:57:20 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: robh+dt@kernel.org X-SENDER-IP: 121.15.173.1 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <487f214ac4a9c898eaabd8fe7f6b2ac7> X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [121.15.173.1]) by smtp.263.net (Postfix) whith ESMTP id 13341A5BI0B; Mon, 25 Apr 2016 14:57:21 +0800 (CST) From: Andy Yan To: robh+dt@kernel.org, heiko@sntech.de, k.kozlowski@samsung.com, sre@kernel.org Cc: john.stultz@linaro.org, arnd@arndb.de, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dbaryshkov@gmail.com, dwmw2@infradead.org, alexandre.belloni@free-electrons.com, moritz.fischer@ettus.com, f.fainelli@gmail.com, linux-pm@vger.kernel.org, Andy Yan Subject: [PATCH v8 3/4] ARM: dts: rockchip: add syscon-reboot-mode DT node Date: Mon, 25 Apr 2016 14:56:52 +0800 Message-Id: <1461567412-21882-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461567051-21734-1-git-send-email-andy.yan@rock-chips.com> References: <1461567051-21734-1-git-send-email-andy.yan@rock-chips.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, URIBL_BLACK autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Rockchip platform use a SYSCON mapped register store the reboot mode magic value for bootloader to use when system reboot. So add syscon-reboot-mode driver DT node for rk3xxx/rk3036/rk3288 based platform Reviewed-by: Matthias Brugger Signed-off-by: Andy Yan --- Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - descirbe all reboot mode as property instead of subnode - add rk3036 support Changes in v2: - make this node as a subnode of PMU Changes in v1: - correct the maskrom magic number - use macro defined in rockchip_boot-mode.h for reboot-mode DT node arch/arm/boot/dts/rk3036.dtsi | 11 ++++++++++- arch/arm/boot/dts/rk3288.dtsi | 10 ++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 12 +++++++++++- include/dt-bindings/soc/rockchip_boot-mode.h | 15 +++++++++++++++ 4 files changed, 46 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/soc/rockchip_boot-mode.h diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index b9567c1..4011c2e 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -261,8 +262,16 @@ }; grf: syscon@20008000 { - compatible = "rockchip,rk3036-grf", "syscon"; + compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd"; reg = <0x20008000 0x1000>; + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x1d8>; + mode-normal = ; + mode-recovery = ; + mode-bootloader = ; + mode-loader = ; + }; }; acodec: acodec-ana@20030000 { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 8ac49f3..9aa7d73 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -45,6 +45,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -713,6 +714,15 @@ clocks = <&cru ACLK_GPU>; }; }; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x94>; + mode-normal = ; + mode-recovery = ; + mode-bootloader = ; + mode-loader = ; + }; }; sgrf: syscon@ff740000 { diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 99eeea7..f8f661f 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -43,6 +43,7 @@ #include #include +#include #include "skeleton.dtsi" / { @@ -243,8 +244,17 @@ }; pmu: pmu@20004000 { - compatible = "rockchip,rk3066-pmu", "syscon"; + compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd"; reg = <0x20004000 0x100>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x40>; + mode-normal = ; + mode-recovery = ; + mode-bootloader = ; + mode-loader = ; + }; }; grf: grf@20008000 { diff --git a/include/dt-bindings/soc/rockchip_boot-mode.h b/include/dt-bindings/soc/rockchip_boot-mode.h new file mode 100644 index 0000000..ae7c867 --- /dev/null +++ b/include/dt-bindings/soc/rockchip_boot-mode.h @@ -0,0 +1,15 @@ +#ifndef __ROCKCHIP_BOOT_MODE_H +#define __ROCKCHIP_BOOT_MODE_H + +/*high 24 bits is tag, low 8 bits is type*/ +#define REBOOT_FLAG 0x5242C300 +/* normal boot */ +#define BOOT_NORMAL (REBOOT_FLAG + 0) +/* enter bootloader rockusb mode */ +#define BOOT_BL_DOWNLOAD (REBOOT_FLAG + 1) +/* enter recovery */ +#define BOOT_RECOVERY (REBOOT_FLAG + 3) + /* enter fastboot mode */ +#define BOOT_FASTBOOT (REBOOT_FLAG + 9) + +#endif