From patchwork Wed Jan 18 18:48:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: srinivas pandruvada X-Patchwork-Id: 9524579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 892616043A for ; Wed, 18 Jan 2017 18:51:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A07F2861E for ; Wed, 18 Jan 2017 18:51:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6DA3D2861C; Wed, 18 Jan 2017 18:51:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 118DE28613 for ; Wed, 18 Jan 2017 18:51:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752504AbdARSvE (ORCPT ); Wed, 18 Jan 2017 13:51:04 -0500 Received: from mga04.intel.com ([192.55.52.120]:20602 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753199AbdARSvD (ORCPT ); Wed, 18 Jan 2017 13:51:03 -0500 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP; 18 Jan 2017 10:48:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,250,1477983600"; d="scan'208";a="50141855" Received: from spandruv-desk.jf.intel.com ([10.54.75.13]) by orsmga004.jf.intel.com with ESMTP; 18 Jan 2017 10:48:35 -0800 From: Srinivas Pandruvada To: rjw@rjwysocki.net, len.brown@intel.com Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Srinivas Pandruvada Subject: [PATCH 4/4] cpufreq: intel_pstate: Calculate guaranteed performance for HWP Date: Wed, 18 Jan 2017 10:48:25 -0800 Message-Id: <1484765305-185352-5-git-send-email-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484765305-185352-1-git-send-email-srinivas.pandruvada@linux.intel.com> References: <1484765305-185352-1-git-send-email-srinivas.pandruvada@linux.intel.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When HWP is active, turbo activation ratio is not used to calculate max non turbo ratio. But on these systems the max non turbo ratio is decided by config TDP settings. This change removes usage of MSR_TURBO_ACTIVATION_RATIO for HWP systems, instead directly use TDP ratios, when more than one TDPs are available. Signed-off-by: Srinivas Pandruvada --- drivers/cpufreq/intel_pstate.c | 75 +++++++++++++++++++++++++++--------------- 1 file changed, 49 insertions(+), 26 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 095bcaf..694c1a3 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -1343,48 +1343,71 @@ static int core_get_max_pstate_physical(void) return (value >> 8) & 0xFF; } +static int core_get_tdp_ratio(u64 plat_info) +{ + /* Check how many TDP levels present */ + if (plat_info & 0x600000000) { + u64 tdp_ctrl; + u64 tdp_ratio; + int tdp_msr; + int err; + + /* Get the TDP level (0, 1, 2) to get ratios */ + err = rdmsrl_safe(MSR_CONFIG_TDP_CONTROL, &tdp_ctrl); + if (err) + return err; + + /* TDP MSR are continuous starting at 0x648 */ + tdp_msr = MSR_CONFIG_TDP_NOMINAL + (tdp_ctrl & 0x3); + err = rdmsrl_safe(tdp_msr, &tdp_ratio); + if (err) + return err; + + /* For level 1 and 2, bits[23:16] contain the ratio */ + if (tdp_ctrl) + tdp_ratio >>= 16; + + tdp_ratio &= 0xff; /* ratios are only 8 bits long */ + pr_debug("tdp_ratio %x\n", (int)tdp_ratio); + + return (int)tdp_ratio; + } + + return -ENXIO; +} + static int core_get_max_pstate(void) { u64 tar; u64 plat_info; int max_pstate; + int tdp_ratio; int err; rdmsrl(MSR_PLATFORM_INFO, plat_info); max_pstate = (plat_info >> 8) & 0xFF; + tdp_ratio = core_get_tdp_ratio(plat_info); + if (tdp_ratio < 0) + return max_pstate; + + if (hwp_active) { + /* Turbo activation ratio is not used on HWP platforms */ + return tdp_ratio; + } + err = rdmsrl_safe(MSR_TURBO_ACTIVATION_RATIO, &tar); if (!err) { + int tar_levels; + /* Do some sanity checking for safety */ - if (plat_info & 0x600000000) { - u64 tdp_ctrl; - u64 tdp_ratio; - int tdp_msr; - - err = rdmsrl_safe(MSR_CONFIG_TDP_CONTROL, &tdp_ctrl); - if (err) - goto skip_tar; - - tdp_msr = MSR_CONFIG_TDP_NOMINAL + (tdp_ctrl & 0x3); - err = rdmsrl_safe(tdp_msr, &tdp_ratio); - if (err) - goto skip_tar; - - /* For level 1 and 2, bits[23:16] contain the ratio */ - if (tdp_ctrl) - tdp_ratio >>= 16; - - tdp_ratio &= 0xff; /* ratios are only 8 bits long */ - if (tdp_ratio - 1 == tar) { - max_pstate = tar; - pr_debug("max_pstate=TAC %x\n", max_pstate); - } else { - goto skip_tar; - } + tar_levels = tar & 0xff; + if (tdp_ratio - 1 == tar_levels) { + max_pstate = tar_levels; + pr_debug("max_pstate=TAC %x\n", max_pstate); } } -skip_tar: return max_pstate; }