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Thu, 19 Jan 2017 13:49:10 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170119134910eucas1p2d401df77ccc1ef8e7b05f4cdb2ffc8d3~bMG3JrjDS0539905399eucas1p2n; Thu, 19 Jan 2017 13:49:10 +0000 (GMT) X-AuditID: cbfec7f4-f79716d000006f65-dc-5880c3d646a8 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id D6.20.10233.1D3C0885; Thu, 19 Jan 2017 13:49:05 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OK100BYG51LGB30@eusync1.samsung.com>; Thu, 19 Jan 2017 13:49:09 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Bartlomiej Zolnierkiewicz Subject: [PATCH v3 12/13] pinctrl: samsung: Move retention control from mach-s5pv210 to the pinctrl driver Date: Thu, 19 Jan 2017 14:48:52 +0100 Message-id: <1484833733-16082-13-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1484833733-16082-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNIsWRmVeSWpSXmKPExsWy7djPc7rXDjdEGLx5rm6xccZ6Vovz5zew W0z5s5zJYtPja6wWm+f/YbT43HuE0WLG+X1MFmuP3GW3OPymndVi1a4/jA5cHjtn3WX32LSq k83jzrU9bB6bl9R79G1ZxejxeZNcAFsUl01Kak5mWWqRvl0CV8bsL1OYC/4rVZw5KdLAuFe2 i5GDQ0LAROL1idguRk4gU0ziwr31bF2MXBxCAksZJc5/msQC4XxmlPj04hczRJWJxLoXuxgh EssYJY71T2AFSQgJNDBJPDuUDWKzCRhKdL3tAhslItDMKDHz7l52EIdZoI9J4vPmvYwgVcIC ORIXWlaCdbMIqEocPr0SLM4r4Clxf84Fdoh1chInj00Gq+EEik+d0wQ2VUKgnV3i/c3vbBBP yEpsOgB1novEjpeTmSBsYYlXx7dAzZGRuDy5mwXC7meUaGrVhrBnMEqce8sLYVtLHD5+EWwX swCfxKRt05khxvNKdLQJQZR4SPxo2wM1xlFi1dp90PCawyhx8+Ej5gmMMgsYGVYxiqSWFuem pxab6BUn5haX5qXrJefnbmIERvnpf8e/7GBcfMzqEKMAB6MSD29HUX2EEGtiWXFl7iFGCQ5m JRFem70NEUK8KYmVValF+fFFpTmpxYcYpTlYlMR59yy4Ei4kkJ5YkpqdmlqQWgSTZeLglGpg nHSuXLbm8XHZ3UJnRRU23VPPsM2sl9o+3fucv3lfmsN3D1fNLw0CdqZtky7k1kbPvKH1qHpO 0hVF8/zlaz/nXrIQ/33y/JX4JU/VBeVXbzZ8kNDy4b/n8ZpfQhL7728qbkzcPe/ltx7LDw9u BbJEMLv9ezIp68TDtetFdfqOmNcvf3Vu3hc+KSWW4oxEQy3mouJEABq2w+LuAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNLMWRmVeSWpSXmKPExsVy+t/xy7oXDzdEGHzfKmKxccZ6Vovz5zew W0z5s5zJYtPja6wWm+f/YbT43HuE0WLG+X1MFmuP3GW3OPymndVi1a4/jA5cHjtn3WX32LSq k83jzrU9bB6bl9R79G1ZxejxeZNcAFuUm01GamJKapFCal5yfkpmXrqtUmiIm66FkkJeYm6q rVKErm9IkJJCWWJOKZBnZIAGHJwD3IOV9O0S3DJmf5nCXPBfqeLMSZEGxr2yXYycHBICJhLr XuxihLDFJC7cW88GYgsJLGGUmHMhF8JuYpLYPccLxGYTMJToetsFVMPFISLQzCjRsKQXzGEW mMAkMfNTAxNIlbBAjsSFlpWsIDaLgKrE4dMrwTbwCnhK3J9zgR1im5zEyWOTwWo4geJT5zRB bfaQWLL0IusERt4FjAyrGEVSS4tz03OLjfSKE3OLS/PS9ZLzczcxAgN+27GfW3Ywdr0LPsQo wMGoxMPbUVQfIcSaWFZcmXuIUYKDWUmE12ZvQ4QQb0piZVVqUX58UWlOavEhRlOgoyYyS4km 5wOjMa8k3tDE0NzS0MjYwsLcyEhJnHfqhyvhQgLpiSWp2ampBalFMH1MHJxSDYy27ut/Xdxp 9HTp0s2BG7sPn15/s2PJnWfzz7wL+LzXcTO3v97sbTdeHCjv2HJv8VKuM90fFy0rX/xsy7Jj YduTCqLERW5vZ93HbhjNUNS56obsTFPnpLWMhQIzy1qzJh3VuBOVfaf+28qI05EvDj012K7f dfD8F9b38zaUxhmIvDcIXbQnZ41nshJLcUaioRZzUXEiADETk0OOAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170119134910eucas1p2d401df77ccc1ef8e7b05f4cdb2ffc8d3 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170119134910eucas1p2d401df77ccc1ef8e7b05f4cdb2ffc8d3 X-RootMTR: 20170119134910eucas1p2d401df77ccc1ef8e7b05f4cdb2ffc8d3 References: <1484833733-16082-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch moves pad retention control from S5PV210 machine code to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine and pin control code. Till now it worked fine only because sys_ops for machine code and pin controller were called in registration order. Signed-off-by: Marek Szyprowski Acked-by: Tomasz Figa For mach-s5pv210: Acked-by: Krzysztof Kozlowski Acked-by: Arnd Bergmann --- arch/arm/mach-s5pv210/pm.c | 7 ---- arch/arm/mach-s5pv210/regs-clock.h | 4 --- drivers/pinctrl/samsung/pinctrl-exynos.c | 56 ++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 2d5f08015e34..07cee14a363b 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -155,13 +155,6 @@ static void s5pv210_suspend_finish(void) */ static void s5pv210_pm_resume(void) { - u32 tmp; - - tmp = __raw_readl(S5P_OTHERS); - tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\ - S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); - __raw_writel(tmp , S5P_OTHERS); - s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); } diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h index 4640f0f03c12..fb3eb77412db 100644 --- a/arch/arm/mach-s5pv210/regs-clock.h +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -188,10 +188,6 @@ #define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) /* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) #define S5P_OTHERS_USB_SIG_MASK (1 << 16) /* S5P_DAC_CONTROL */ diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index e7a099c4fb78..63e51b56a22a 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -643,6 +644,60 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) exynos_pinctrl_resume_bank(drvdata, bank); } +/* Retention control for S5PV210 are located at the end of clock controller */ +#define S5P_OTHERS 0xE000 + +#define S5P_OTHERS_RET_IO (1 << 31) +#define S5P_OTHERS_RET_CF (1 << 30) +#define S5P_OTHERS_RET_MMC (1 << 29) +#define S5P_OTHERS_RET_UART (1 << 28) + +static void s5pv210_retention_disable(struct samsung_pinctrl_drv_data *drvdata) +{ + void *clk_base = drvdata->retention_ctrl->priv; + u32 tmp; + + tmp = __raw_readl(clk_base + S5P_OTHERS); + tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | S5P_OTHERS_RET_MMC | + S5P_OTHERS_RET_UART); + __raw_writel(tmp, clk_base + S5P_OTHERS); +} + +static struct samsung_retention_ctrl * +s5pv210_retention_init(struct samsung_pinctrl_drv_data *drvdata, + const struct samsung_retention_data *data) +{ + struct samsung_retention_ctrl *ctrl; + struct device_node *np; + void *clk_base; + + ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return ERR_PTR(-ENOMEM); + + np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); + if (!np) { + pr_err("%s: failed to find clock controller DT node\n", + __func__); + return ERR_PTR(-ENODEV); + } + + clk_base = of_iomap(np, 0); + if (!clk_base) { + pr_err("%s: failed to map clock registers\n", __func__); + return ERR_PTR(-EINVAL); + } + + ctrl->priv = clk_base; + ctrl->disable = s5pv210_retention_disable; + + return ctrl; +} + +static const struct samsung_retention_data s5pv210_retention_data __initconst = { + .init = s5pv210_retention_init, +}; + /* pin banks of s5pv210 pin-controller */ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), @@ -690,6 +745,7 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) .eint_wkup_init = exynos_eint_wkup_init, .suspend = exynos_pinctrl_suspend, .resume = exynos_pinctrl_resume, + .retention_data = &s5pv210_retention_data, }, };