From patchwork Tue Jan 9 09:19:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikanta Maddireddy X-Patchwork-Id: 10151239 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9222660223 for ; Tue, 9 Jan 2018 09:20:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96DF1289AD for ; Tue, 9 Jan 2018 09:20:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8903C283CA; Tue, 9 Jan 2018 09:20:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D9F9289A8 for ; Tue, 9 Jan 2018 09:20:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751933AbeAIJUg (ORCPT ); Tue, 9 Jan 2018 04:20:36 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:16773 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751916AbeAIJUf (ORCPT ); Tue, 9 Jan 2018 04:20:35 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 09 Jan 2018 01:20:48 -0800 Received: from HQMAIL101.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 09 Jan 2018 01:21:31 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 09 Jan 2018 01:21:31 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 9 Jan 2018 09:20:34 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Tue, 9 Jan 2018 09:20:34 +0000 Received: from manikanta-pc.nvidia.com (Not Verified[10.19.65.32]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 09 Jan 2018 01:20:33 -0800 From: Manikanta Maddireddy To: , , , CC: , , , , , , , , , , , Manikanta Maddireddy Subject: [PATCH V5 3/7] PCI: tegra: Remove PCI_REASSIGN_ALL_BUS flag for Tegra PCIe Date: Tue, 9 Jan 2018 14:49:33 +0530 Message-ID: <1515489577-2197-4-git-send-email-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1515489577-2197-1-git-send-email-mmaddireddy@nvidia.com> References: <1515489577-2197-1-git-send-email-mmaddireddy@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Primary, secondary and subordinate default bus numbers are 0 in Tegra and it is expecting SW to program these numbers in configration space. pci_scan_bridge_extend() function programs these numbers in configuration space if secondary & subordinate bus numbers are 0 or PCI_REASSIGN_ALL_BUS flag is set. Since secondary & subordinate default bus numbers are 0, PCI_REASSIGN_ALL_BUS flag can be removed for Tegra PCIe. Signed-off-by: Manikanta Maddireddy Acked-by: Thierry Reding Acked-by: Lorenzo Pieralisi --- V3: * new patch in V3 V4: * no change in this patch V5: * no change in this patch drivers/pci/host/pci-tegra.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index d790a26ad87e..e4b47ebc91fe 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -2293,7 +2293,6 @@ static int tegra_pcie_probe(struct platform_device *pdev) tegra_pcie_enable_ports(pcie); - pci_add_flags(PCI_REASSIGN_ALL_BUS); host->busnr = pcie->busn.start; host->dev.parent = &pdev->dev; host->ops = &tegra_pcie_ops;