From patchwork Tue Mar 10 10:10:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Hsiung Wang X-Patchwork-Id: 11429005 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A64F8138D for ; Tue, 10 Mar 2020 10:11:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7E41924687 for ; Tue, 10 Mar 2020 10:11:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="ksPszvzi" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726491AbgCJKKx (ORCPT ); Tue, 10 Mar 2020 06:10:53 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:42711 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726199AbgCJKKx (ORCPT ); Tue, 10 Mar 2020 06:10:53 -0400 X-UUID: 34719fa14c37412c9cc979f9dea59a1f-20200310 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=a9EBRq1NN/wbj7E+tzJXbC0ZXvmXx8HMCccIA8ONyLc=; b=ksPszvzikMIpUz/vunEAiKSC5Kzpc2bmpeq08pD3BuAF3j8jCtYbfR2Vfu2rp/3bBb6ciO3E7A83tgxxDLXP6JjJaXas7SmRAEL/HBxxCJWNt9yIcK0wsq7IiqqPTbFaSKXGJP83rQOG09gvEybkkl7Hp02ltTYeU+fiiso91OE=; X-UUID: 34719fa14c37412c9cc979f9dea59a1f-20200310 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 922481140; Tue, 10 Mar 2020 18:10:46 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 10 Mar 2020 18:06:19 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 10 Mar 2020 18:07:59 +0800 From: Hsin-Hsiung Wang To: Lee Jones , Rob Herring , Alexandre Belloni , Matthias Brugger CC: Mark Rutland , Sean Wang , Sebastian Reichel , Eddie Huang , Alessandro Zummo , Hsin-Hsiung Wang , Frank Wunderlich , Thomas Gleixner , Richard Fontana , Josef Friedl , Ran Bi , , , , , , , Nicolas Boichat , Subject: [PATCH v9 4/5] rtc: mt6397: Add support for the MediaTek MT6358 RTC Date: Tue, 10 Mar 2020 18:10:39 +0800 Message-ID: <1583835040-19157-5-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1583835040-19157-1-git-send-email-hsin-hsiung.wang@mediatek.com> References: <1583835040-19157-1-git-send-email-hsin-hsiung.wang@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: CB323D5109DFD0B68FB40BAC4FE3119C2060C7528207A66DFE4B545D726C57412000:8 X-MTK: N Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Ran Bi This add support for the MediaTek MT6358 RTC. Driver using compatible data to store different RTC_WRTGR address offset. This replace RTC_WRTGR to RTC_WRTGR_MT6323 in mt6323-poweroff driver which only needed by armv7 CPU without ATF. Signed-off-by: Ran Bi Signed-off-by: Hsin-Hsiung Wang --- drivers/power/reset/mt6323-poweroff.c | 2 +- drivers/rtc/rtc-mt6397.c | 24 ++++++++++++++++-------- include/linux/mfd/mt6397/rtc.h | 17 ++++++++++++++++- 3 files changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/power/reset/mt6323-poweroff.c b/drivers/power/reset/mt6323-poweroff.c index 1caf43d..0532803 100644 --- a/drivers/power/reset/mt6323-poweroff.c +++ b/drivers/power/reset/mt6323-poweroff.c @@ -30,7 +30,7 @@ static void mt6323_do_pwroff(void) int ret; regmap_write(pwrc->regmap, pwrc->base + RTC_BBPU, RTC_BBPU_KEY); - regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR, 1); + regmap_write(pwrc->regmap, pwrc->base + RTC_WRTGR_MT6323, 1); ret = regmap_read_poll_timeout(pwrc->regmap, pwrc->base + RTC_BBPU, val, diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index cda238d..bc577ef 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -9,18 +9,30 @@ #include #include #include +#include #include #include #include #include #include +static const struct of_device_id mt6397_rtc_of_match[] = { + { .compatible = "mediatek,mt6323-rtc", + .data = (void *)&mt6397_rtc_data, }, + { .compatible = "mediatek,mt6358-rtc", + .data = (void *)&mt6358_rtc_data, }, + { .compatible = "mediatek,mt6397-rtc", + .data = (void *)&mt6397_rtc_data, }, + {} +}; +MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); + static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) { int ret; u32 data; - ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1); + ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1); if (ret < 0) return ret; @@ -269,6 +281,9 @@ static int mtk_rtc_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); rtc->addr_base = res->start; + rtc->data = (struct mtk_rtc_data *) + of_device_get_match_data(&pdev->dev); + rtc->irq = platform_get_irq(pdev, 0); if (rtc->irq < 0) return rtc->irq; @@ -325,13 +340,6 @@ static int mt6397_rtc_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend, mt6397_rtc_resume); -static const struct of_device_id mt6397_rtc_of_match[] = { - { .compatible = "mediatek,mt6323-rtc", }, - { .compatible = "mediatek,mt6397-rtc", }, - { } -}; -MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); - static struct platform_driver mtk_rtc_driver = { .driver = { .name = "mt6397-rtc", diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h index 7dfb63b..3dc48e8 100644 --- a/include/linux/mfd/mt6397/rtc.h +++ b/include/linux/mfd/mt6397/rtc.h @@ -18,7 +18,9 @@ #define RTC_BBPU_CBUSY BIT(6) #define RTC_BBPU_KEY (0x43 << 8) -#define RTC_WRTGR 0x003c +#define RTC_WRTGR_MT6358 0x3a +#define RTC_WRTGR_MT6397 0x3c +#define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397 #define RTC_IRQ_STA 0x0002 #define RTC_IRQ_STA_AL BIT(0) @@ -65,6 +67,10 @@ #define MTK_RTC_POLL_DELAY_US 10 #define MTK_RTC_POLL_TIMEOUT (jiffies_to_usecs(HZ)) +struct mtk_rtc_data { + u32 wrtgr; +}; + struct mt6397_rtc { struct device *dev; struct rtc_device *rtc_dev; @@ -74,6 +80,15 @@ struct mt6397_rtc { struct regmap *regmap; int irq; u32 addr_base; + const struct mtk_rtc_data *data; +}; + +static const struct mtk_rtc_data mt6358_rtc_data = { + .wrtgr = RTC_WRTGR_MT6358, +}; + +static const struct mtk_rtc_data mt6397_rtc_data = { + .wrtgr = RTC_WRTGR_MT6397, }; #endif /* _LINUX_MFD_MT6397_RTC_H_ */