From patchwork Tue May 31 18:44:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 9145503 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 10E1760777 for ; Tue, 31 May 2016 18:46:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 055A020072 for ; Tue, 31 May 2016 18:46:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE26E20700; Tue, 31 May 2016 18:46:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UPPERCASE_50_75 autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3FA1C20072 for ; Tue, 31 May 2016 18:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756069AbcEaSpI (ORCPT ); Tue, 31 May 2016 14:45:08 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:45884 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751586AbcEaSpG (ORCPT ); Tue, 31 May 2016 14:45:06 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4VIj29c004638; Tue, 31 May 2016 13:45:02 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4VIj2BJ011788; Tue, 31 May 2016 13:45:02 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Tue, 31 May 2016 13:45:01 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4VIj0HS020075; Tue, 31 May 2016 13:45:00 -0500 Received: from localhost (uda0226330.am.dhcp.ti.com [128.247.83.127]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u4VIj0326461; Tue, 31 May 2016 13:45:00 -0500 (CDT) From: "Andrew F. Davis" To: =?UTF-8?q?Pali=20Roh=C3=A1r?= , Sebastian Reichel , Dmitry Eremin-Solenikov , David Woodhouse CC: , , "Andrew F . Davis" Subject: [PATCH 2/3] power_supply: bq27xxx_battery: Index register numbers by enum Date: Tue, 31 May 2016 13:44:59 -0500 Message-ID: <20160531184500.10871-2-afd@ti.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160531184500.10871-1-afd@ti.com> References: <20160531184500.10871-1-afd@ti.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently we use tables to map from register function to register number, these tables assume the enum used to describe the register function and index the register number is ordered to match the enum order. Index the register numbers by the enum instead. This also removes the need to comment each value with its function. Signed-off-by: Andrew F. Davis --- drivers/power/bq27xxx_battery.c | 238 ++++++++++++++++++++-------------------- 1 file changed, 119 insertions(+), 119 deletions(-) diff --git a/drivers/power/bq27xxx_battery.c b/drivers/power/bq27xxx_battery.c index 45f6ebf..01737fa 100644 --- a/drivers/power/bq27xxx_battery.c +++ b/drivers/power/bq27xxx_battery.c @@ -104,143 +104,143 @@ enum bq27xxx_reg_index { /* Register mappings */ static u8 bq27000_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - INVALID_REG_ADDR, /* INT TEMP - NA*/ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - 0x18, /* TTF */ - 0x1c, /* TTES */ - 0x26, /* TTECP */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - 0x22, /* AE */ - 0x0b, /* SOC(RSOC) */ - 0x76, /* DCAP(ILMD) */ - 0x24, /* AP */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = 0x18, + [BQ27XXX_REG_TTES] = 0x1c, + [BQ27XXX_REG_TTECP] = 0x26, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = 0x22, + [BQ27XXX_REG_SOC] = 0x0b, + [BQ27XXX_REG_DCAP] = 0x76, + [BQ27XXX_REG_AP] = 0x24, }; static u8 bq27010_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - INVALID_REG_ADDR, /* INT TEMP - NA*/ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - 0x18, /* TTF */ - 0x1c, /* TTES */ - 0x26, /* TTECP */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - INVALID_REG_ADDR, /* AE - NA */ - 0x0b, /* SOC(RSOC) */ - 0x76, /* DCAP(ILMD) */ - INVALID_REG_ADDR, /* AP - NA */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = 0x18, + [BQ27XXX_REG_TTES] = 0x1c, + [BQ27XXX_REG_TTECP] = 0x26, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x0b, + [BQ27XXX_REG_DCAP] = 0x76, + [BQ27XXX_REG_AP] = INVALID_REG_ADDR, }; static u8 bq27500_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - 0x28, /* INT TEMP */ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - INVALID_REG_ADDR, /* TTF - NA */ - 0x1a, /* TTES */ - INVALID_REG_ADDR, /* TTECP - NA */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - INVALID_REG_ADDR, /* AE - NA */ - 0x2c, /* SOC(RSOC) */ - 0x3c, /* DCAP(ILMD) */ - INVALID_REG_ADDR, /* AP - NA */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = 0x28, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTES] = 0x1a, + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x2c, + [BQ27XXX_REG_DCAP] = 0x3c, + [BQ27XXX_REG_AP] = INVALID_REG_ADDR, }; static u8 bq27530_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - 0x32, /* INT TEMP */ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - INVALID_REG_ADDR, /* TTF - NA */ - INVALID_REG_ADDR, /* TTES - NA */ - INVALID_REG_ADDR, /* TTECP - NA */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - INVALID_REG_ADDR, /* AE - NA */ - 0x2c, /* SOC(RSOC) */ - INVALID_REG_ADDR, /* DCAP - NA */ - 0x24, /* AP */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = 0x32, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x2c, + [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, + [BQ27XXX_REG_AP] = 0x24, }; static u8 bq27541_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - 0x28, /* INT TEMP */ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - INVALID_REG_ADDR, /* TTF - NA */ - INVALID_REG_ADDR, /* TTES - NA */ - INVALID_REG_ADDR, /* TTECP - NA */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - INVALID_REG_ADDR, /* AE - NA */ - 0x2c, /* SOC(RSOC) */ - 0x3c, /* DCAP */ - 0x24, /* AP */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = 0x28, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x2c, + [BQ27XXX_REG_DCAP] = 0x3c, + [BQ27XXX_REG_AP] = 0x24, }; static u8 bq27545_regs[] = { - 0x00, /* CONTROL */ - 0x06, /* TEMP */ - 0x28, /* INT TEMP */ - 0x08, /* VOLT */ - 0x14, /* AVG CURR */ - 0x0a, /* FLAGS */ - 0x16, /* TTE */ - INVALID_REG_ADDR, /* TTF - NA */ - INVALID_REG_ADDR, /* TTES - NA */ - INVALID_REG_ADDR, /* TTECP - NA */ - 0x0c, /* NAC */ - 0x12, /* LMD(FCC) */ - 0x2a, /* CYCT */ - INVALID_REG_ADDR, /* AE - NA */ - 0x2c, /* SOC(RSOC) */ - INVALID_REG_ADDR, /* DCAP - NA */ - 0x24, /* AP */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x06, + [BQ27XXX_REG_INT_TEMP] = 0x28, + [BQ27XXX_REG_VOLT] = 0x08, + [BQ27XXX_REG_AI] = 0x14, + [BQ27XXX_REG_FLAGS] = 0x0a, + [BQ27XXX_REG_TTE] = 0x16, + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, + [BQ27XXX_REG_NAC] = 0x0c, + [BQ27XXX_REG_FCC] = 0x12, + [BQ27XXX_REG_CYCT] = 0x2a, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x2c, + [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, + [BQ27XXX_REG_AP] = 0x24, }; static u8 bq27421_regs[] = { - 0x00, /* CONTROL */ - 0x02, /* TEMP */ - 0x1e, /* INT TEMP */ - 0x04, /* VOLT */ - 0x10, /* AVG CURR */ - 0x06, /* FLAGS */ - INVALID_REG_ADDR, /* TTE - NA */ - INVALID_REG_ADDR, /* TTF - NA */ - INVALID_REG_ADDR, /* TTES - NA */ - INVALID_REG_ADDR, /* TTECP - NA */ - 0x08, /* NAC */ - 0x0e, /* FCC */ - INVALID_REG_ADDR, /* CYCT - NA */ - INVALID_REG_ADDR, /* AE - NA */ - 0x1c, /* SOC */ - 0x3c, /* DCAP */ - 0x18, /* AP */ + [BQ27XXX_REG_CTRL] = 0x00, + [BQ27XXX_REG_TEMP] = 0x02, + [BQ27XXX_REG_INT_TEMP] = 0x1e, + [BQ27XXX_REG_VOLT] = 0x04, + [BQ27XXX_REG_AI] = 0x10, + [BQ27XXX_REG_FLAGS] = 0x06, + [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, + [BQ27XXX_REG_NAC] = 0x08, + [BQ27XXX_REG_FCC] = 0x0e, + [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, + [BQ27XXX_REG_SOC] = 0x1c, + [BQ27XXX_REG_DCAP] = 0x3c, + [BQ27XXX_REG_AP] = 0x18, }; static u8 *bq27xxx_regs[] = {