From patchwork Thu Aug 10 12:52:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 9893645 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AD36B60236 for ; Thu, 10 Aug 2017 12:52:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9EBE820090 for ; Thu, 10 Aug 2017 12:52:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 93726284C7; Thu, 10 Aug 2017 12:52:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 33C9920090 for ; Thu, 10 Aug 2017 12:52:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752109AbdHJMwe (ORCPT ); Thu, 10 Aug 2017 08:52:34 -0400 Received: from mail-lf0-f49.google.com ([209.85.215.49]:36547 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751387AbdHJMwe (ORCPT ); Thu, 10 Aug 2017 08:52:34 -0400 Received: by mail-lf0-f49.google.com with SMTP id o85so3005476lff.3 for ; Thu, 10 Aug 2017 05:52:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1Ajz05yrfb8hAQ4+waiFrks150m3CGXE4R2+zqetv8M=; b=Yat/WH8YmG5yi/3wfkn4VtWwfSxou2t4xIM24kG3Lwbzs2MIZ/T9lwsOAT/hJv9bUL xt0sBDAdc2Wxij6QK0ha5RGFGh912ekCYjcO/Pi1wNWLXsR5N0xVR64HAMnSUfIQsNyS ArrsGP0J5NvV5XdFNh3iFuFA3bcSaBUHQRizs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1Ajz05yrfb8hAQ4+waiFrks150m3CGXE4R2+zqetv8M=; b=dCZ1qOsdYsfSDgNZn+jAFPkRX+5HzSlkCrqDGUARuVRDzv+R3KjjGvFFtPq+eSjN8S XxyBBq6OUCFV3nxmNnxJn9QjNQYwXnCYQGatljyNvp0JYpjSWsiRfNmUBykBAgcXMb5z fYwpaoYaZ9rHTn789MZDa55GMabSjkk6g81UQcb8glxumWZCVM7EaWbuKmNiQ6AV07g4 pYxZDVSKFik6hdpXv3CpEqbnbwo6uu3t06RVQEbqOs9zB7Q8O5QaOPTPDYon+0L+S3vw Paw/AVdoaR1cLUTu38bdX69eEdjDiDaGAgEap9V6bMDSxFWw1Xv5shj5mnIF/XmMK78q CBgA== X-Gm-Message-State: AHYfb5jD+iwsg4+GJbUA0HJBEVqKEAgGgVQCfH6dDv+WDMAYY118FtYO TZaNdGe0R2KPm0HO X-Received: by 10.46.84.86 with SMTP id y22mr4009900ljd.135.1502369552670; Thu, 10 Aug 2017 05:52:32 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 15sm726816ljw.35.2017.08.10.05.52.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Aug 2017 05:52:31 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 1/4] ARM: dts: augment Ux500 to use DT cpufreq Date: Thu, 10 Aug 2017 14:52:18 +0200 Message-Id: <20170810125221.25818-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170810125221.25818-1-linus.walleij@linaro.org> References: <20170810125221.25818-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the operating points to the Ux500 device tree and deletes the old special-purpose cpufreq node, as we can now use the generic DT cpufreq driver. Signed-off-by: Linus Walleij --- Viresh et al: I will merge this into ARM SoC separately from the rest of the patches once we agree on this approach. --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 6c5affe2d0f5..2310a4e97768 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -37,6 +37,14 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0x300>; + /* cpufreq controls */ + operating-points = <998400 0 + 800000 0 + 400000 0 + 200000 0>; + clocks = <&prcmu_clk PRCMU_ARMSS>; + clock-names = "cpu"; + clock-latency = <20000>; }; CPU1: cpu@301 { device_type = "cpu"; @@ -494,13 +502,6 @@ reg = <0x80157450 0xC>; }; - cpufreq { - compatible = "stericsson,cpufreq-ux500"; - clocks = <&prcmu_clk PRCMU_ARMSS>; - clock-names = "armss"; - status = "disabled"; - }; - thermal@801573c0 { compatible = "stericsson,db8500-thermal"; reg = <0x801573c0 0x40>;