From patchwork Thu Aug 10 12:52:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 9893649 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F3E360236 for ; Thu, 10 Aug 2017 12:52:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 906B720090 for ; Thu, 10 Aug 2017 12:52:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 853F8284C7; Thu, 10 Aug 2017 12:52:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D0E9F20090 for ; Thu, 10 Aug 2017 12:52:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752162AbdHJMwo (ORCPT ); Thu, 10 Aug 2017 08:52:44 -0400 Received: from mail-lf0-f52.google.com ([209.85.215.52]:34728 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751387AbdHJMwn (ORCPT ); Thu, 10 Aug 2017 08:52:43 -0400 Received: by mail-lf0-f52.google.com with SMTP id g25so3073333lfh.1 for ; Thu, 10 Aug 2017 05:52:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Kv6r//6qwuJbfOthgfjdvX5mM0dhpw2dHa5SyeSxv/U=; b=Yg3XzuZEO/cd952Vxz/Mr3A9GUHc9MCZ2CaL1hwC90405qyZd292EmGyKwD9ArnMMe oDPXiTQiCjhqheOxj8wiAAshi28AtKxQqQucGOe/47kzRwCYD6J3C0/GeMkTP9DJ/Dou MkoZPBG8J2yrib+dTmf1HQT7slqetRWZlPJ98= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Kv6r//6qwuJbfOthgfjdvX5mM0dhpw2dHa5SyeSxv/U=; b=JKcTW/iTJYTSrOCEciTQeRPjr/vQsCCSVGRw4nTGnZGHsZtqdOME2IleU4cajvC11F sLDrj9noXRdZiFVpHvAb3Cn9MbQt+NAdCjzYq/ArueT7mDL1F4hjEDmJ7bA/KoAXDRSd ggT2O5vRJK//Je/MJWa+WnGcmANqA0M4nWAaMElVs570IjpNnnTKY73/XDCu0ooR5M7B 5m+kSjaVnO0I1pVHJby2ck9ILq4ht63eeMwJLSdmug122ocXigZgdQ79pVNbOl4Wrak/ t6/ahr661bsIxm6TbI55CbSQk6kAKyolXyDjL6QFjs9w7Io54mlfxoD3FNy6TlRj2gLO mPBA== X-Gm-Message-State: AHYfb5hFkCxBmrucfRwZWQ8oIX8UczZsjJvKkfwaTp+QDAb2dJiSl+Pf UqD1B/UyDt7ZwJr4 X-Received: by 10.46.22.13 with SMTP id w13mr4050717ljd.76.1502369562032; Thu, 10 Aug 2017 05:52:42 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 15sm726816ljw.35.2017.08.10.05.52.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Aug 2017 05:52:40 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 3/4] mfd: db8500-prcmu: Get rid of cpufreq dependency Date: Thu, 10 Aug 2017 14:52:20 +0200 Message-Id: <20170810125221.25818-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170810125221.25818-1-linus.walleij@linaro.org> References: <20170810125221.25818-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ARMSS clock, also known as the operating point of the CPU, should not cross-depend on cpufreq like this. Move the code to use just frequencies and remove the false frequency (1GHz) and put in the actual frequency provided by the ARMSS clock (998400000 Hz) as part of the process. After this and the related cpufreq patch, the DB8500 will simply use the standard DT cpufreq driver to change the operating points through the common clock framework using the ARMSS clock. Cc: Lee Jones Signed-off-by: Linus Walleij --- Lee, this needs to be merged together with the other related cpufreq patches, so an ACK to take this through the cpufreq subsystem would be appreciated once you're pleased with it. --- drivers/mfd/db8500-prcmu.c | 59 +++++++++++++--------------------------------- 1 file changed, 17 insertions(+), 42 deletions(-) diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 5c739ac752e8..a66be0203ece 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include "dbx500-prcmu-regs.h" @@ -1692,32 +1691,22 @@ static long round_clock_rate(u8 clock, unsigned long rate) return rounded_rate; } -/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */ -static struct cpufreq_frequency_table db8500_cpufreq_table[] = { - { .frequency = 200000, .driver_data = ARM_EXTCLK,}, - { .frequency = 400000, .driver_data = ARM_50_OPP,}, - { .frequency = 800000, .driver_data = ARM_100_OPP,}, - { .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */ - { .frequency = CPUFREQ_TABLE_END,}, -}; +static const unsigned long armss_freqs[] = { 200000000, 400000000, 800000000, 998400000 }; static long round_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - long freq = 0; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq = 0; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) { - freq = pos->frequency; - if (freq == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate <= freq) break; } /* Return the last valid value, even if a match was not found. */ - return freq * 1000; + return freq; } #define MIN_PLL_VCO_RATE 600000000ULL @@ -1854,21 +1843,23 @@ static void set_clock_rate(u8 clock, unsigned long rate) static int set_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq; + u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP }; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) - if (pos->frequency == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate == freq) break; + } - if (pos->frequency != rate) + if (rate != freq) return -EINVAL; /* Set the new arm opp. */ - return db8500_prcmu_set_arm_opp(pos->driver_data); + pr_debug("SET ARM OPP 0x%02x\n", opps[i]); + return db8500_prcmu_set_arm_opp(opps[i]); } static int set_plldsi_rate(unsigned long rate) @@ -3049,12 +3040,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { .pdata_size = sizeof(db8500_regulators), }, { - .name = "cpufreq-ux500", - .of_compatible = "stericsson,cpufreq-ux500", - .platform_data = &db8500_cpufreq_table, - .pdata_size = sizeof(db8500_cpufreq_table), - }, - { .name = "cpuidle-dbx500", .of_compatible = "stericsson,cpuidle-dbx500", }, @@ -3067,14 +3052,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { }, }; -static void db8500_prcmu_update_cpufreq(void) -{ - if (prcmu_has_arm_maxopp()) { - db8500_cpufreq_table[3].frequency = 1000000; - db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP; - } -} - static int db8500_prcmu_register_ab8500(struct device *parent) { struct device_node *np; @@ -3160,8 +3137,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev) prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); - db8500_prcmu_update_cpufreq(); - err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs, ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain); if (err) {