Message ID | 20180116101240.5393-3-alexandre.belloni@free-electrons.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
On Tue, Jan 16, 2018 at 11:12:34AM +0100, Alexandre Belloni wrote: > Add binding documentation for the Microsemi Ocelot reset block. > > Cc: Rob Herring <robh+dt@kernel.org> > Cc: devicetree@vger.kernel.org > Cc: Sebastian Reichel <sre@kernel.org> > Cc: linux-pm@vger.kernel.org > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > .../devicetree/bindings/power/reset/ocelot-reset.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt Reviewed-by: Rob Herring <robh@kernel.org>
Hi, On Tue, Jan 16, 2018 at 11:12:34AM +0100, Alexandre Belloni wrote: > Add binding documentation for the Microsemi Ocelot reset block. > > Cc: Rob Herring <robh+dt@kernel.org> > Cc: devicetree@vger.kernel.org > Cc: Sebastian Reichel <sre@kernel.org> > Cc: linux-pm@vger.kernel.org > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- Thanks, queued. My public for-next branch is waiting for 4.16-rc1 tag, though. -- Sebastian > .../devicetree/bindings/power/reset/ocelot-reset.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > > diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > new file mode 100644 > index 000000000000..1b4213eb3473 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > @@ -0,0 +1,14 @@ > +Microsemi Ocelot reset controller > + > +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the > +SoC MIPS core. > + > +Required Properties: > + - compatible: "mscc,ocelot-chip-reset" > + > +Example: > + reset@1070008 { > + compatible = "mscc,ocelot-chip-reset"; > + reg = <0x1070008 0x4>; > + }; > + > -- > 2.15.1 >
diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt new file mode 100644 index 000000000000..1b4213eb3473 --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt @@ -0,0 +1,14 @@ +Microsemi Ocelot reset controller + +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the +SoC MIPS core. + +Required Properties: + - compatible: "mscc,ocelot-chip-reset" + +Example: + reset@1070008 { + compatible = "mscc,ocelot-chip-reset"; + reg = <0x1070008 0x4>; + }; +
Add binding documentation for the Microsemi Ocelot reset block. Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: Sebastian Reichel <sre@kernel.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> --- .../devicetree/bindings/power/reset/ocelot-reset.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt