From patchwork Wed Feb 7 01:41:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 10204423 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4D5F260327 for ; Wed, 7 Feb 2018 01:41:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 407C928C5B for ; Wed, 7 Feb 2018 01:41:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3516328D7A; Wed, 7 Feb 2018 01:41:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BDFCF28C5B for ; Wed, 7 Feb 2018 01:41:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932344AbeBGBld (ORCPT ); Tue, 6 Feb 2018 20:41:33 -0500 Received: from mail-pl0-f66.google.com ([209.85.160.66]:41297 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932207AbeBGBlb (ORCPT ); Tue, 6 Feb 2018 20:41:31 -0500 Received: by mail-pl0-f66.google.com with SMTP id k8so2478764pli.8 for ; Tue, 06 Feb 2018 17:41:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2xgtUaa2k+KwF9dxx2VhCEHTg9Rq69cek44jk2/ug3Q=; b=ZTDikZjDR7wDsNBQu9ZIqjx+KqxIpbgmpgycAluyPIyYIM3Fo2XIsBE7laHmkvqTgA 1NVXRoWPU/PHwaXNlsxLJ4zGtUq+RioXm7ZPCAcavx38zjETTiPn3UOQIIhcoGaCpMSC yvrCNQjn1xLRSEI1zXOP1s+2eyzsZOjQoquEw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2xgtUaa2k+KwF9dxx2VhCEHTg9Rq69cek44jk2/ug3Q=; b=AIM6Y6Aj5Cx6Bvrs2QXsdk24dFj4hj4zZLVcDLeX3y7WkP0ktESbCEnSqlvssKswYQ /cbzQ5ZS91feHyF+gSFSeFbCRn6DDA7GFy6FpRp21KylylyNhpqtyh2rbpDBWClnKRGJ uOmQHdGiXMUz5Ls7AF/zXVjCmEk+s8kN1NXALOpDzwIA45HtPraJYTBe8cAYy81Ap3jK 8RyEoi9txPPOJeCag275M51Dr6Ng1bvBsUjEI8oxwjHqomudMgNBJ3u5fq7pz6ESIbA4 ophujTNdQ/41P/9ERvKHg62oRgcH9pLnw7LXYOc6udhpBNX6Y5zRZKnYIYEIJm6qSEuA 9HgQ== X-Gm-Message-State: APf1xPCYmvBdUmH50IleUc74OyVin8wFgIAiEqJtKP6rmEeDHq74+FCe JbHIJ8rR4U8+YvfODdyRou7RdQ== X-Google-Smtp-Source: AH8x226DNSkwA5OspbwGdDI0xDy4cIIM75ATM5Gsee/ob9RXojvTyaiVEiAn8JQ77S4+cbIcKkWD0A== X-Received: by 2002:a17:902:aa0b:: with SMTP id be11-v6mr4175786plb.250.1517967690502; Tue, 06 Feb 2018 17:41:30 -0800 (PST) Received: from exogeni.mtv.corp.google.com ([2620:0:1000:1600:211e:5908:95bc:4888]) by smtp.gmail.com with ESMTPSA id k71sm573529pfg.52.2018.02.06.17.41.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Feb 2018 17:41:29 -0800 (PST) From: Derek Basehore To: linux-kernel@vger.kernel.org Cc: Soby.Mathew@arm.com, sudeep.holla@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-pm@vger.kernel.org, rafael.j.wysocki@intel.com, tglx@linutronix.de, briannorris@chromium.org, marc.zyngier@arm.com, Derek Basehore Subject: [PATCH v5 4/4] irqchip/gic-v3-its: add ability to resend MAPC on resume Date: Tue, 6 Feb 2018 17:41:17 -0800 Message-Id: <20180207014117.62611-5-dbasehore@chromium.org> X-Mailer: git-send-email 2.16.0.rc1.238.g530d649a79-goog In-Reply-To: <20180207014117.62611-1-dbasehore@chromium.org> References: <20180207014117.62611-1-dbasehore@chromium.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds functionality to resend the MAPC command to an ITS node on resume. If the ITS is powered down during suspend and the collections are not backed by memory, the ITS will lose that state. This just sets up the known state for the collections after the ITS is restored. This is enabled via the reset-on-suspend flag in the DTS for an ITS that has a non-zero number of collections stored in it. Signed-off-by: Derek Basehore --- drivers/irqchip/irq-gic-v3-its.c | 80 ++++++++++++++++++++------------------ include/linux/irqchip/arm-gic-v3.h | 1 + 2 files changed, 43 insertions(+), 38 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 5e63635e2a7b..dd6cd6e68ed0 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1942,52 +1942,53 @@ static void its_cpu_init_lpis(void) dsb(sy); } -static void its_cpu_init_collection(void) +static void its_cpu_init_collection(struct its_node *its) { - struct its_node *its; - int cpu; - - spin_lock(&its_lock); - cpu = smp_processor_id(); - - list_for_each_entry(its, &its_nodes, entry) { - u64 target; + int cpu = smp_processor_id(); + u64 target; - /* avoid cross node collections and its mapping */ - if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { - struct device_node *cpu_node; + /* avoid cross node collections and its mapping */ + if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { + struct device_node *cpu_node; - cpu_node = of_get_cpu_node(cpu, NULL); - if (its->numa_node != NUMA_NO_NODE && - its->numa_node != of_node_to_nid(cpu_node)) - continue; - } + cpu_node = of_get_cpu_node(cpu, NULL); + if (its->numa_node != NUMA_NO_NODE && + its->numa_node != of_node_to_nid(cpu_node)) + return; + } + /* + * We now have to bind each collection to its target + * redistributor. + */ + if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { /* - * We now have to bind each collection to its target + * This ITS wants the physical address of the * redistributor. */ - if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { - /* - * This ITS wants the physical address of the - * redistributor. - */ - target = gic_data_rdist()->phys_base; - } else { - /* - * This ITS wants a linear CPU number. - */ - target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); - target = GICR_TYPER_CPU_NUMBER(target) << 16; - } + target = gic_data_rdist()->phys_base; + } else { + /* This ITS wants a linear CPU number. */ + target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); + target = GICR_TYPER_CPU_NUMBER(target) << 16; + } - /* Perform collection mapping */ - its->collections[cpu].target_address = target; - its->collections[cpu].col_id = cpu; + /* Perform collection mapping */ + its->collections[cpu].target_address = target; + its->collections[cpu].col_id = cpu; - its_send_mapc(its, &its->collections[cpu], 1); - its_send_invall(its, &its->collections[cpu]); - } + its_send_mapc(its, &its->collections[cpu], 1); + its_send_invall(its, &its->collections[cpu]); +} + +static void its_cpu_init_collections(void) +{ + struct its_node *its; + + spin_lock(&its_lock); + + list_for_each_entry(its, &its_nodes, entry) + its_cpu_init_collection(its); spin_unlock(&its_lock); } @@ -3127,6 +3128,9 @@ static void its_restore_enable(void) its_write_baser(its, baser, baser->val); } writel_relaxed(its->ctlr_save, base + GITS_CTLR); + + if (GITS_TYPER_HWCOLLCNT(gic_read_typer(base + GITS_TYPER)) > 0) + its_cpu_init_collection(its); } spin_unlock(&its_lock); } @@ -3393,7 +3397,7 @@ int its_cpu_init(void) return -ENXIO; } its_cpu_init_lpis(); - its_cpu_init_collection(); + its_cpu_init_collections(); } return 0; diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c00c4c33e432..c9c33b91a1f1 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -313,6 +313,7 @@ #define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1) #define GITS_TYPER_PTA (1UL << 19) #define GITS_TYPER_HWCOLLCNT_SHIFT 24 +#define GITS_TYPER_HWCOLLCNT(r) (((r) >> GITS_TYPER_HWCOLLCNT_SHIFT) & 0xff) #define GITS_TYPER_VMOVP (1ULL << 37) #define GITS_IIDR_REV_SHIFT 12