From patchwork Wed Mar 28 06:38:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Francisco Jerez X-Patchwork-Id: 10312239 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0721860467 for ; Wed, 28 Mar 2018 06:43:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECEC42993B for ; Wed, 28 Mar 2018 06:43:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1D45299E0; Wed, 28 Mar 2018 06:43:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DD522993B for ; Wed, 28 Mar 2018 06:43:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752286AbeC1Gny (ORCPT ); Wed, 28 Mar 2018 02:43:54 -0400 Received: from mx1.riseup.net ([198.252.153.129]:58002 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752319AbeC1Gnv (ORCPT ); Wed, 28 Mar 2018 02:43:51 -0400 Received: from cotinga.riseup.net (cotinga-pn.riseup.net [10.0.1.164]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (Client CN "*.riseup.net", Issuer "COMODO RSA Domain Validation Secure Server CA" (verified OK)) by mx1.riseup.net (Postfix) with ESMTPS id 99AFD1A09D5; Tue, 27 Mar 2018 23:43:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1522219430; bh=UuspJu8JMTu5y9db4CDJpowK2TgbGQRkHE/Ix8DZi/g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=neOfX34glzayxicjjwWoeBd96GjRYtAS9oINFZiqae0HRXLpfSsrlPY+z7k3Mn273 uFGoej4eOW4wn862qJFrgdyKHyR1JsGOCm+cZ/Xpwr/NAriAPIg0nfnfAYL7Sco/PQ 5X51w8phbzPf4R+n+/cJFTGKpEwJTE8Kb+TRHn/g= X-Riseup-User-ID: 5F6E00434302AD1249C67DD758A3F4D2A6B63C9C60C01E90D586F8A77D285A4B Received: from [127.0.0.1] (localhost [127.0.0.1]) by cotinga.riseup.net with ESMTPSA id 5472A6C439; Tue, 27 Mar 2018 23:43:50 -0700 (PDT) From: Francisco Jerez To: linux-pm@vger.kernel.org, intel-gfx@lists.freedesktop.org, Srinivas Pandruvada Cc: "Rafael J. Wysocki" , Eero Tamminen , Valtteri Rantala Subject: [PATCH 7/9] SQUASH: cpufreq/intel_pstate: Enable LP controller based on ACPI FADT profile. Date: Tue, 27 Mar 2018 23:38:43 -0700 Message-Id: <20180328063845.4884-8-currojerez@riseup.net> In-Reply-To: <20180328063845.4884-1-currojerez@riseup.net> References: <20180328063845.4884-1-currojerez@riseup.net> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is provided at Srinivas' request. The LP controller is disabled for the moment on server FADT profiles in order to avoid disturbing the performance behavior of small-core servers. In cases where the default inferred from the BIOS FADT profile is suboptimal, the LP controller can be forcefully enabled or disabled by passing "intel_pstate=lp" or "intel_pstate=no_lp" respectively in the kernel command line. Signed-off-by: Francisco Jerez --- Documentation/admin-guide/kernel-parameters.txt | 6 +++++ Documentation/admin-guide/pm/intel_pstate.rst | 7 ++++++ drivers/cpufreq/intel_pstate.c | 32 ++++++++++++++++++++++++- 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 1d1d53f85ddd..0ba112696938 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1681,6 +1681,12 @@ per_cpu_perf_limits Allow per-logical-CPU P-State performance control limits using cpufreq sysfs interface + lp + Force use of LP P-state controller. Overrides selection + derived from ACPI FADT profile. Has no effect if HWP is + available. + no_lp + Prevent use of LP P-state controller (see "lp" parameter). intremap= [X86-64, Intel-IOMMU] on enable Interrupt Remapping (default) diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst index d2b6fda3d67b..a5885fc4c039 100644 --- a/Documentation/admin-guide/pm/intel_pstate.rst +++ b/Documentation/admin-guide/pm/intel_pstate.rst @@ -642,6 +642,13 @@ of them have to be prepended with the ``intel_pstate=`` prefix. Use per-logical-CPU P-State limits (see `Coordination of P-state Limits`_ for details). +``lp`` + Force use of LP P-state controller. Overrides selection derived + from ACPI FADT profile. Has no effect if HWP is available. + +``no_lp`` + Prevent use of LP P-state controller (see "lp" parameter). + Diagnostics and Tuning ====================== diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index d4b5d0aaa282..d0e212387755 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2485,6 +2485,7 @@ static int intel_pstate_update_status(const char *buf, size_t size) static int no_load __initdata; static int no_hwp __initdata; +static int no_lp __initdata; static int hwp_only __initdata; static unsigned int force_load __initdata; @@ -2507,8 +2508,12 @@ static void __init copy_cpu_funcs(struct pstate_funcs *funcs) pstate_funcs.get_scaling = funcs->get_scaling; pstate_funcs.get_val = funcs->get_val; pstate_funcs.get_vid = funcs->get_vid; - pstate_funcs.update_util = funcs->update_util; pstate_funcs.get_aperf_mperf_shift = funcs->get_aperf_mperf_shift; + + if (no_lp) + pstate_funcs.update_util = intel_pstate_update_util; + else + pstate_funcs.update_util = funcs->update_util; } #ifdef CONFIG_ACPI @@ -2690,6 +2695,25 @@ static int __init intel_pstate_init(void) } device_initcall(intel_pstate_init); +#ifdef CONFIG_ACPI +static bool __init is_server_acpi_profile(void) +{ + switch (acpi_gbl_FADT.preferred_profile) { + case PM_ENTERPRISE_SERVER: + case PM_SOHO_SERVER: + case PM_PERFORMANCE_SERVER: + return true; + default: + return false; + } +} +#else +static bool __init is_server_acpi_profile(void) +{ + return false; +} +#endif + static int __init intel_pstate_setup(char *str) { if (!str) @@ -2713,6 +2737,12 @@ static int __init intel_pstate_setup(char *str) if (!strcmp(str, "per_cpu_perf_limits")) per_cpu_limits = true; + no_lp = is_server_acpi_profile(); + if (!strcmp(str, "lp")) + no_lp = 0; + if (!strcmp(str, "no_lp")) + no_lp = 1; + #ifdef CONFIG_ACPI if (!strcmp(str, "support_acpi_ppc")) acpi_ppc = true;