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[2/6] dt-bindings: clock: add DDR3 standard speed bins.

Message ID 20180419104019.24406-3-enric.balletbo@collabora.com (mailing list archive)
State Deferred
Headers show

Commit Message

Enric Balletbo i Serra April 19, 2018, 10:40 a.m. UTC
DDR3 SDRAM Standard (JESD79-3F) defines some standard speed bins for
DDR3 memories. The devfreq/rk3399_dmc.txt binding refers to this file
which does not exist, so add a ddr.h file with the standard speed bins
for DDR3.

Fixes: c1ceb8f7c167 (Documentation: bindings: add dt documentation for rk3399 dmc)
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---

 include/dt-bindings/clock/ddr.h | 34 +++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 include/dt-bindings/clock/ddr.h

Comments

Heiko Stübner April 19, 2018, 11:10 a.m. UTC | #1
Hi Enric,

Am Donnerstag, 19. April 2018, 12:40:15 CEST schrieb Enric Balletbo i Serra:
> DDR3 SDRAM Standard (JESD79-3F) defines some standard speed bins for
> DDR3 memories. The devfreq/rk3399_dmc.txt binding refers to this file
> which does not exist, so add a ddr.h file with the standard speed bins
> for DDR3.
> 
> Fixes: c1ceb8f7c167 (Documentation: bindings: add dt documentation for rk3399 dmc)
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> 
>  include/dt-bindings/clock/ddr.h | 34 +++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>  create mode 100644 include/dt-bindings/clock/ddr.h
> 
> diff --git a/include/dt-bindings/clock/ddr.h b/include/dt-bindings/clock/ddr.h
> new file mode 100644
> index 000000000000..506aef7e609e
> --- /dev/null
> +++ b/include/dt-bindings/clock/ddr.h
> @@ -0,0 +1,34 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> +
> +#ifndef DT_BINDINGS_DDR_H
> +#define DT_BINDINGS_DDR_H
> +
> +/* DDR3-800 Standard Speed Bins */
> +#define DDR3_800D	15
> +#define DDR3_800E		18
> +/* DDR3-1066 Standard Speed Bins */
> +#define DDR3_1066E	18
> +#define DDR3_1066F	21
> +#define DDR3_1066G	24

looking at the mentioned jedec standard, I don't see where these numerical
values are defined in the standard itself. [I may be blind though]

Could you explain a bit more where these numerical values are coming from?


Thanks
Heiko
Enric Balletbo i Serra April 19, 2018, 11:30 a.m. UTC | #2
Hi Heiko,

On 19/04/18 13:10, Heiko Stuebner wrote:
> Hi Enric,
> 
> Am Donnerstag, 19. April 2018, 12:40:15 CEST schrieb Enric Balletbo i Serra:
>> DDR3 SDRAM Standard (JESD79-3F) defines some standard speed bins for
>> DDR3 memories. The devfreq/rk3399_dmc.txt binding refers to this file
>> which does not exist, so add a ddr.h file with the standard speed bins
>> for DDR3.
>>
>> Fixes: c1ceb8f7c167 (Documentation: bindings: add dt documentation for rk3399 dmc)
>> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
>> ---
>>
>>  include/dt-bindings/clock/ddr.h | 34 +++++++++++++++++++++++++++++++++
>>  1 file changed, 34 insertions(+)
>>  create mode 100644 include/dt-bindings/clock/ddr.h
>>
>> diff --git a/include/dt-bindings/clock/ddr.h b/include/dt-bindings/clock/ddr.h
>> new file mode 100644
>> index 000000000000..506aef7e609e
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/ddr.h
>> @@ -0,0 +1,34 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>> +
>> +#ifndef DT_BINDINGS_DDR_H
>> +#define DT_BINDINGS_DDR_H
>> +
>> +/* DDR3-800 Standard Speed Bins */
>> +#define DDR3_800D	15
>> +#define DDR3_800E		18
>> +/* DDR3-1066 Standard Speed Bins */
>> +#define DDR3_1066E	18
>> +#define DDR3_1066F	21
>> +#define DDR3_1066G	24
> 
> looking at the mentioned jedec standard, I don't see where these numerical
> values are defined in the standard itself. [I may be blind though]
> 

Damm it. No, you're not blind. I did an horrible mistake adding an old version
of this file. It's wrong, that is supposed to be there is DDR3 table available
in the ATF [1] not this.

        /* 5-5-5 */
	DDR3_800D = 0,
	/* 6-6-6 */
	DDR3_800E = 1,
	/* 6-6-6 */
	DDR3_1066E = 2,
	/* 7-7-7 */
	DDR3_1066F = 3,
        ...

The value is passed directly to the ATF so the above values are the correct.

One question that I have on my mind is if this file should be called as is or if
will be better name as atf-ddr.h or something like that.
ddr.h -> atf-ddr.h

[1]
https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.h

Sorry about that. Guess it's needed a v2 but let's wait a little bit for if more
discussion arises.

Best regards,
  Enric

> Could you explain a bit more where these numerical values are coming from?
> 
> 
> Thanks
> Heiko
>
Heiko Stübner April 20, 2018, 10:58 a.m. UTC | #3
Hi Enric,

Am Donnerstag, 19. April 2018, 13:30:16 CEST schrieb Enric Balletbo i Serra:
> On 19/04/18 13:10, Heiko Stuebner wrote:
> > Am Donnerstag, 19. April 2018, 12:40:15 CEST schrieb Enric Balletbo i Serra:
> >> DDR3 SDRAM Standard (JESD79-3F) defines some standard speed bins for
> >> DDR3 memories. The devfreq/rk3399_dmc.txt binding refers to this file
> >> which does not exist, so add a ddr.h file with the standard speed bins
> >> for DDR3.
> >>
> >> Fixes: c1ceb8f7c167 (Documentation: bindings: add dt documentation for rk3399 dmc)
> >> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> >> ---
> >>
> >>  include/dt-bindings/clock/ddr.h | 34 +++++++++++++++++++++++++++++++++
> >>  1 file changed, 34 insertions(+)
> >>  create mode 100644 include/dt-bindings/clock/ddr.h
> >>
> >> diff --git a/include/dt-bindings/clock/ddr.h b/include/dt-bindings/clock/ddr.h
> >> new file mode 100644
> >> index 000000000000..506aef7e609e
> >> --- /dev/null
> >> +++ b/include/dt-bindings/clock/ddr.h
> >> @@ -0,0 +1,34 @@
> >> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
> >> +
> >> +#ifndef DT_BINDINGS_DDR_H
> >> +#define DT_BINDINGS_DDR_H
> >> +
> >> +/* DDR3-800 Standard Speed Bins */
> >> +#define DDR3_800D	15
> >> +#define DDR3_800E		18
> >> +/* DDR3-1066 Standard Speed Bins */
> >> +#define DDR3_1066E	18
> >> +#define DDR3_1066F	21
> >> +#define DDR3_1066G	24
> > 
> > looking at the mentioned jedec standard, I don't see where these numerical
> > values are defined in the standard itself. [I may be blind though]
> > 
> 
> Damm it. No, you're not blind. I did an horrible mistake adding an old version
> of this file. It's wrong, that is supposed to be there is DDR3 table available
> in the ATF [1] not this.

Mistakes can always happen ... so no problem :-) .


>         /* 5-5-5 */
> 	DDR3_800D = 0,
> 	/* 6-6-6 */
> 	DDR3_800E = 1,
> 	/* 6-6-6 */
> 	DDR3_1066E = 2,
> 	/* 7-7-7 */
> 	DDR3_1066F = 3,
>         ...
> 
> The value is passed directly to the ATF so the above values are the correct.
> 
> One question that I have on my mind is if this file should be called as is or if
> will be better name as atf-ddr.h or something like that.
> ddr.h -> atf-ddr.h

The more interesting question would be if this isn't a very much rockchip
or even rk3399-specific scheme. So such a generic header name looks very
much out of place (also including the very generic constant names).

So far the only upstream ATF implementation is for the rk3399.


Heiko

> 
> [1]
> https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.h
>
> Sorry about that. Guess it's needed a v2 but let's wait a little bit for if more
> discussion arises.
> 
> Best regards,
>   Enric
> 
> > Could you explain a bit more where these numerical values are coming from?
> > 
> > 
> > Thanks
> > Heiko
> > 
> 
>
diff mbox

Patch

diff --git a/include/dt-bindings/clock/ddr.h b/include/dt-bindings/clock/ddr.h
new file mode 100644
index 000000000000..506aef7e609e
--- /dev/null
+++ b/include/dt-bindings/clock/ddr.h
@@ -0,0 +1,34 @@ 
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+
+#ifndef DT_BINDINGS_DDR_H
+#define DT_BINDINGS_DDR_H
+
+/* DDR3-800 Standard Speed Bins */
+#define DDR3_800D	15
+#define DDR3_800E	18
+/* DDR3-1066 Standard Speed Bins */
+#define DDR3_1066E	18
+#define DDR3_1066F	21
+#define DDR3_1066G	24
+/* DDR3-1333 Standard Speed Bins */
+#define DDR3_1333F	21
+#define DDR3_1333G	24
+#define DDR3_1333H	27
+#define DDR3_1333J	30
+/* DDR3-1600 Standard Speed Bins */
+#define DDR3_1600G	24
+#define DDR3_1600H	27
+#define DDR3_1600J	30
+#define DDR3_1600K	33
+/* DDR3-1600 Standard Speed Bins */
+#define DDR3_1866J	30
+#define DDR3_1866K	33
+#define DDR3_1866L	36
+#define DDR3_1866M	39
+/* DDR3-2133 Standard Speed Bins */
+#define DDR3_2133K	33
+#define DDR3_2133L	36
+#define DDR3_2133M	39
+#define DDR3_2133N	42
+
+#endif